Datasheet

Electrical Characteristics (continued)
(V
AVDD
= 3.6V, V
AVSS
= 0V, V
DVDD
= 2.0V, V
REFP
= 2.5V, V
REFN
= 0V; f
DATA
= 1000sps, External Clock = 8.192MHz; Continuous
conversion mode (SCYCLE = 0); PGA maximum output is 300mV below AVDD and minimum output is 300mV above AVSS,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ANALOG INPUTS/REFERENCE INPUTS
AIN Voltage Range V
RNG
Unipolar 0 V
REF
V
Bipolar -V
REF
V
REF
Absolute Input Voltage VABS
RNG
Bypass mode V
AVSS
V
AVDD
V
PGA mode
V
AVSS
+ 0.3
V
AVDD
- 1.3
Buffer mode
V
AVSS
+ 0.1
V
AVDD
- 0.1
AIN DC Input Leakage
(Note 4)
IIN
LEAK
Sleep mode enabled -10 +10 nA
AIN Common-Mode Input
Conductance
G
AINCM
Bypass ±8 nA/V
AIN Common-Mode Input
Current
I
AINCM
Buffer ±500 nA
PGA ±21 nA
AIN Differential Mode Input
Conductance
G
AINDIFF
Bypass ±23 µA/V
AIN Differential Mode Input
Current
I
AINDIFF
Buffer ±20 nA
PGA ±0.15 nA
REF Differential Input
Conductance
G
REFDIFF
Active conversion state ±46.5 µA/V
REF Input Current at Power
Down
I
REF_PD
Sleep and Standby states ±2.5 µA/V
AIN Input Capacitance C
IN
Buffer disabled 3 pF
REF Input Capacitance C
REF
Buffer disabled 4.5 pF
Input and REF Sampling
Rate
f
S
4.096 MHz
V
REFP
- V
REFN
Voltage
Range
VRABS
RNG
(Note 5) V
AVDD
V
REF Voltage Range V
REF
1.5 V
AVDD
V
DIGITAL FILTER RESPONSE
SINC FILTER
Bandwidth (-3dB) BW
SINC
0.203 f
DATA
Settling Time (Latency) 5 1/f
DATA
MAX11270 24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma
ADC with Integrated PGA
www.maximintegrated.com
Maxim Integrated │ 7