Datasheet

Figure 9. Calibration Flow Diagram
SUBTRACT
SCOC
MULTIPLY
SCGC
SUBTRACT
SOC
MULTIPLY
SGC
DATA
NOSCO=0
NOSCG=0
T
F
T
F
NOSYSO=0
T
F
NOSYSG=0
F
T
STATUS REG
CAL BLOCKSPI BLOCK
UNIPOLAR
x2
F
T
LIMITER
SCOC_ADC
SCGC_ADC
SOC_ADC
SGC_ADC
24
24
24
24
RAW RESULT
FINAL
RESULT
MAX11270 24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma
ADC with Integrated PGA
www.maximintegrated.com
Maxim Integrated │ 40