Datasheet

Control Registers
These are registers reserved for configuring the MAX11270.
Control 1 Register (Read/Write)
The CTRL1 register is an 8-bit read/write register. The byte written to the CTRL1 register determines the clock setting,
synchronization mode, power-down or reset state, input range is unipolar or bipolar, data output is two’s complement or
offset binary, and conversion mode is in single cycle or continuous.
BIT
B07 B06 B05 B04 B03 B02 B01 B00
BIT NAME EXTCK SYNC PD1 PD0 U/B FORMAT SCYCLE CONTSC
DEFAULT 0 0 0 0 0 0 1 0
BIT DEFAULT LABEL FUNCTION
00 0 CONTSC
Continuous single-cycle bit. Set CONTSC = 1 to select continuous conversions. Set CONTSC
= 0 to select a single conversion.
01 1 SCYCLE
Single-cycle control bit. Set SCYCLE = 1 to select single-cycle mode. The MAX11270
completes one no-latency conversion and then powers down into a leakage-only state. Set
SCYCLE = 0 to select continuous conversion mode.
02 0 FORMAT
Bipolar range format bit. When reading bipolar data, set FORMAT = 0 to select two’s
complement and FORMAT = 1 to select offset binary. The data from unipolar range is always
formatted in offset binary format.
03 0 U/B
U/B: Unipolar/bipolar bit. Set U/B = 1 to select the unipolar input range (0 to V
REF
). Set U/B = 0
to select the bipolar input range (±V
REF
).
04 0 PD0
00 Normal power-up state. This is the default state.
01
Sleep Mode—Powers down the subregulator and the entire digital circuitry. Upon
resumption of power to the digital the PD[1:0] reverts to the default state of ‘00’.
05 0 PD1
10 Standby power—Powers down the analog blocks leaving the subregulator powered up.
11
Resets all registers to POR state leaving the subregulator powered. The PD[1:0] bits
are reset to ‘00’. The operation of this state is identical to the RST pin.
06 0 SYNC
Set SYNC = 1 to select continuous synchronization mode. Set SYNC = 0 to select pulse
synchronization mode.
07 0 EXTCK
External clock bit. Set EXTCLK = 1 to selects the external clock as the system clock. Set
EXTCLK = 0 to select the internal oscillator as the system clock.
MAX11270 24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma
ADC with Integrated PGA
www.maximintegrated.com
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