Datasheet

Register Map
Register Address Map
There are 14 registers that can be accessed in the MAX11270. The majority of registers can be both written to and read
from, but the STAT and DATA registers are read only. The RAM and SYNC are not physical registers, but addresses to
enable special operating modes.
Table 8. Register Address Map
REGISTER
NAME
R/W
ADDRESS
SELECT
RS[3:0]
B7 B6 B5 B4 B3 B2 B1 B0
STAT R 0x0
INRESET ERROR — — PDSTAT1 PDSTAT0 RDERR AOR
RATE3 RATE2 RATE1 RATE0 SYSGOR DOR MSTAT RDY
CTRL1 R/W 0x1 EXTCK SYNCMODE PD1 PD0 U/~B FORMAT SCYCLE CONTSC
CTRL2 R/W 0x2 DGAIN1 DGAIN0 BUFEN LPMODE PGAEN PGAG2 PGAG1 PGAG0
CTRL3 R/W 0x3 — — ENMSYNC MODBITS DATA32 — — —
CTRL4 R/W 0x4 — DIR3 DIR2 DIR1 — DIO3 DIO2 DIO1
CTRL5 R/W 0x5 CAL1 CAL0 — — NOSYSG NOSYSO NOSCG NOSCO
DATA R 0x6 D[23:0]
SOC_SPI R/W 0x7 B[23:0]
SGC_SPI R/W 0x8 B[23:0]
SCOC_SPI R/W 0x9 B[23:0]
SCGC_SPI R/W 0xA B[23:0]
RAM R/W 0xC
Address space only, not a physical register. Please contact factory for instructions on using internal RAM
function.
SYNC_SPI W 0xD
Address space only, not a physical register. Please contact factory for instructions on using internal RAM
function.
SOC_ADC R 0x15 B[23:0]
SGC_ADC R 0x16 B[23:0]
SCOC_ADC R 0x17 B[23:0]
SCGC_ADC R 0x18 B[23:0]
MAX11270 24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma
ADC with Integrated PGA
www.maximintegrated.com
Maxim Integrated │ 30