Datasheet

Table 3. Single-Cycle Mode SNR (dB) vs. Data Rate and PGA Gain with Sinc Filter*
DATA
RATE
(sps)
DIRECT
CONNECT
BUFFER
PGA ENABLED: GAIN SETTING
1 2 4 8 16 32 64 128
LN LP LN LP LN LP LN LP LN LP LN LP LN LP LN LP
50 123.9 123.6 119.0 119.0 121.9 121.9 123.3 123.3 123.2 123.2 123.0 122.7 122.0 121.1 119.1 117.6 114.1 112.1
62.5 124.0 123.4 119.0 119.0 121.7 121.7 123.1 123.1 123.0 123.0 122.8 122.3 121.5 120.5 118.7 116.7 113.1 111.2
100 120.1 119.8 115.3 115.2 118.1 118.1 119.5 119.6 119.3 119.2 119.2 118.9 118.0 117.5 115.7 114.4 111.0 108.9
125 120.2 119.9 115.2 115.1 118.1 118.1 119.4 119.3 119.3 119.2 119.0 118.8 118.0 117.1 115.2 113.5 110.1 108.1
200 118.2 117.6 113.0 113.0 116.0 116.0 117.3 117.3 117.3 117.2 116.9 116.7 115.8 115.0 112.9 111.4 107.9 105.7
250 118.0 117.6 113.0 113.0 115.9 115.9 117.3 117.3 117.1 117.1 116.8 116.4 115.4 114.5 112.3 110.6 107.2 104.9
400 114.2 113.8 109.1 109.1 112.1 112.0 113.5 113.5 113.4 113.3 113.1 112.8 112.2 111.5 109.6 108.0 104.8 102.6
500 114.2 113.7 109.1 109.1 112.0 112.0 113.4 113.4 113.2 113.2 112.9 112.5 111.8 110.9 108.8 107.3 103.7 101.6
800 112.0 111.7 107.0 107.1 109.9 110.0 111.3 111.3 111.2 111.1 110.8 110.5 109.6 108.7 106.6 105.0 101.4 99.2
1000 112.0 111.6 107.0 106.9 109.9 109.8 111.2 111.2 111.1 110.9 110.6 110.1 109.1 108.0 105.8 103.9 100.3 98.2
1600 108.1 107.7 103.1 103.1 106.0 106.0 107.4 107.3 107.3 107.1 106.8 106.5 105.6 104.8 102.7 101.1 97.5 95.3
2000 107.9 107.5 103.0 102.9 105.9 105.8 107.2 107.2 107.1 106.9 106.5 106.1 105.0 103.9 101.5 99.8 96.2 94.0
3200 106.0 105.6 101.0 101.0 103.9 103.9 105.2 105.2 105.1 105.0 104.6 104.2 103.2 102.2 99.9 98.2 94.6 92.4
4000 105.8 105.4 100.8 100.8 103.7 103.7 105.0 105.0 104.8 104.7 104.2 103.7 102.4 101.3 98.8 97.0 93.2 91.1
6400 101.9 101.5 96.9 96.9 99.8 99.8 101.2 101.2 101.0 100.9 100.5 100.1 99.0 98.0 95.7 93.9 90.2 88.2
12800 101.4 100.9 96.4 96.3 99.2 99.2 100.6 100.5 100.3 100.1 99.5 98.9 97.5 96.4 93.7 91.9 88.1 86.0
*V
IN
= 0V. V
AVDD
= 3.6V, V
AVSS
= 0V, V
REF
= 3.6V, T
A
= +25°C, external clock. Data taken with PGA output 150mV from AVDD
and AVSS. This table is not tested and is based on characterization data.
MAX11270 24-Bit, 10mW, 130dB SNR, 64ksps Delta-Sigma
ADC with Integrated PGA
www.maximintegrated.com
Maxim Integrated
20