Datasheet

3Maxim Integrated
18-Bit, Single-Channel, Ultra-Low-Power, Delta-
Sigma ADCs with Programmable Gain and GPIO
MAX11209/MAX11211
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= +3.6V, V
DVDD
= +1.7V, V
REFP
- V
REFN
= V
AVDD
; internal clock, single-cycle mode (SCYCLE = 1), T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25NC under normal conditions, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Absolute Input Voltage
Low input voltage
Buffers disabled
V
GND
-
30mV
V
Buffers enabled
V
GND
+
100mV
High input voltage
Buffers disabled
V
AVDD
+
30mV
Buffers enabled
V
AVDD
-
100mV
DC Input Leakage Sleep mode
Q1 FA
AIN Dynamic Input Current
Buffer disabled
Q1.4 FA/V
Buffer enabled
Q20
nA
REF Dynamic Input Current
Buffer disabled
Q2.1 FA/V
Buffer enabled
Q30
nA
AIN Input Capacitance Buffer disabled 5 pF
REF Input Capacitance Buffer disabled 7.5 pF
AIN Voltage Range
Unipolar 0 V
REF
V
Bipolar -V
REF
+V
REF
Input Sampling Rate f
S
LINEF = 0 246
kHz
LINEF = 1 204.8
REF Voltage Range
Buffers disabled 0 V
AVDD
V
Buffers enabled 0.1
V
AVDD
- 0.1
REF Sampling Rate
LINEF = 0 246
kHz
LINEF = 1 204.8
LOGIC INPUTS (SCLK, CLK, DIN, GPIO1–GPIO4)
Input Current Input leakage current
Q1 FA
Input Low Voltage V
IL
0.3 x
V
DVDD
V
Input High Voltage V
IH
0.7 x
V
DVDD
V
Input Hysteresis V
HYS
200 mV
External Clock
60Hz line frequency 2.4576
MHz55Hz line frequency 2.25275
50Hz line frequency 2.048
LOGIC OUTPUTS (RDY/DOUT, GPIO1–GPIO4)
Output Low Level V
OL
I
OL
= 1mA; also tested for V
DVDD
= 3.6V 0.4 V
Output High Level V
OH
I
OH
= 1mA; also tested for V
DVDD
= 3.6V
0.9 x
V
DVDD
V
Leakage Current High-impedance state
Q500
nA
Output Capacitance High-impedance state 9 pF