Datasheet

PINS SELECTION
2-1
AVDD supplied by output from MAX8510EXK29
(2.85V)
2-3 AVDD supplied by host, pin 6 of connector J1
SCK
MISO
GND
AVDD
150R1
150R2
AV DD
2. 2uF
C9
REFP
MISO
SCK
0. 01uF
C8
GND
1
REFP
2
REFN
3
AINN
4
AINP
5
AVDD
6
DVDD
7
RDY/DOUT
8
SCLK
9
CLK
10
MAX11205AEUB
U2
1
3
2
EMIFILT
F1
GND
GND
1
1
10uF
C6
GND
0. 1uF
C2
0. 1uF
C3
0. 1uF
C4
2. 2uF
C10
1
VIN-
VIN+
REF
IN
1
GND
2
SHDN
3
BYP
4
OU T
5
MAX8510EXK29
U1
GND
0. 01u FC7
0. 1uF
C1
GN D
0. 1uF
C5
GND
1
2
3
4
5
6
J1
IC(nc)
1
GN D
2
SHDN
3
IN
4
OUT
5
MAX6037AAUK25
U3
AINP
1
2
3
JP1
GND
GND
GND
AVDD
DVDD
33R3
33R4
33R5
VCC
_________________________________________________________________ Maxim Integrated Products 3
MAX11205PMB1 Peripheral Module
Reference Voltage
The peripheral module contains a MAX6037 precision
voltage reference for the REFP input of the ADC IC. The
MAX6037 outputs a 2.5V reference.
Software and FPGA Code
Example software and drivers are available that execute
directly without modification on several FPGA develop-
ment boards that support an integrated or synthesized
microprocessor. These boards include the Digilent Nexys
3, Avnet LX9, and Avnet ZEDBoard, although other plat-
forms can be added over time. Maxim provides complete
Xilinx ISE projects containing HDL, Platform Studio, and
SDK projects. In addition, a synthesized bitstream, ready
for FPGA download, is provided for the demonstration
application.
The software project (for the SDK) contains several
source files intended to accelerate customer evalu-
ation and design. These include a base application
(maximModules.c) that demonstrates module function-
ality and uses an API interface (maximDeviceSpecific
Utilities.c) to set and access Maxim device functions
within a specific module.
The source code is written in standard ANSI C format, and
all API documentation including theory/operation, register
description, and function prototypes are documented in
the API interface file (maximDeviceSpecificUtilities.h & .c).
The complete software kit is available for download at
www.maxim-ic.com. Quick start instructions are also
available as a separate document.
Table 2. Jumper JP1
(Analog VDD Selection)
Figure 1. MAX11205PMB1 Peripheral Module Schematic