Datasheet

MAX11190 4-Channel, Dual, Simultaneous Sampling,
2.2V to 3.6V, 12-Bit, 3Msps SAR ADC in Tiny
3mm x 3mm TQFN Package
www.maximintegrated.com
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Dual-Channel Operation
The MAX11190 features dual simultaneous-sampling
ADCs each with two multiplexed channels. This device
uses a channel-select (CHSEL) input to select between
analoginputAIN1A/AIN1B(CHSEL=0)orAIN2A/AIN2B
(CHSEL=1).AsshowninFigure 12,theCHSELsignalis
required to change between the 2nd and 12th clock cycle
within a regular conversion to guarantee proper switching
between channels.
14-Cycle Conversion Mode
The IC can operate with 14 cycles per conversion.
Figure 13 shows the corresponding timing diagram.
Observe that DOUTA/DOUTB does not go into high-
impedance mode. Also, observe that t
ACQ
needs to be
sufficiently long to guarantee proper settling of the analog
input voltage. See the Electrical Characteristics table for
t
ACQ
requirements and the Analog Input section for a
description of the analog inputs.
Applications Information
Layout, Grounding, and Bypassing
For best performance, use PCBs with a solid ground
plane. Ensure that digital and analog signal lines are
separated from each other. Do not run analog and
digital (especially clock) lines parallel to one another or
digital lines underneath the ADC package. Noise in the
V
DD
power supply, OVDD, and REFA/REFB affects the
ADC’sperformance.BypasstheV
DD
, OVDD, and REFA/
REFB to ground with 0.1µF and 10µF bypass capacitors.
Minimize capacitor lead and trace lengths for best supply-
noise rejection.
Choosing an Input Amplier
It is important to match the settling time of the input ampli-
fier to the acquisition time of the ADC. The conversion
results are accurate when the ADC samples the input
signalforanintervallongerthantheinputsignal’sworst-
case settling time. By definition, settling time is the interval
Figure 12. Channel Select Timing Diagram
Figure 13. 14-Clock Cycle Operation
1
DATA CHANNEL AIN1A DATA CHANNEL AIN2A
SCLK
CHSEL
DOUTA
DOUTB
CS
DATA CHANNEL AIN1B DATA CHANNEL AIN2B
2345678910111213141516 12345678910 11 12 13 14 15 16
1
DOUTA
DOUTB
SCLK
(MSB)
SAMPLE SAMPLE
1/f
SAMPLE
t
ACQ
t
CONVERT
CS
234
D10D11
5678910111213141
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 000