Datasheet

Maxim Integrated │ 16
MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs
with Internal Reference in TDFN
www.maximintegrated.com
Pin Conguration
Pin Description
PIN NAME I/O FUNCTION
1 REFIO I/O
External Reference Input/Internal Reference Output. Place a 0.1µF capacitor from REFIO to
AGNDS.
2 REF I/O
External Reference Input/Reference Buffer Decoupling. Bypass to AGNDS in close proximity with a
X5R or X7R 10µF 16V chip. See the Layout, Grounding, and Bypassing section.
3 V
DD
I
Analog Power Supply. Bypass to GND with a 0.1µF capacitor for each device and one 10µF
per PCB.
4 AIN+ I Positive Analog Input
5 AIN- I Negative Analog Input. Connect AIN- to the analog ground plane or to a remote-sense ground.
6 GND I Power-Supply Ground
7 CNVST I
Convert Start Input. The rising edge of CNVST initiates conversions. The falling edge of CNVST
with SCLK high enables the serial interface.
8 DOUT O Serial Data Output. DOUT will change stated on the falling edge of SCLK.
9 SCLK I Serial Clock Input. Clocks data out of the serial interface when the device is selected.
10 DIN I Serial Data Input. DIN data is latched into the serial interface on the rising edge of SCLK.
11 OVDD I
Digital Power Supply. Bypass to GND with a 0.1µF capacitor for each device and one 10µF
per PCB.
12 AGNDS I
Analog Ground Sense. Zero current reference for the on-board DAC and reference source.
Reference for REFIO and REF.
— EP — Exposed Pad. EP is connected internally to GND. Connect to PCB GND.
1
3
4
12
10
9
8
AGNDS
DIN
SCLK
DOUT
MAX11166
MAX11167
2
11
OVDD
5
6
+
7
CNVST
REFIO
V
DD
AIN+
AIN-
REF
GND
EP
TDFN
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