Datasheet
MAX11100
16-Bit, +5V, 200ksps ADC with 10µA Shutdown
8Maxim Integrated
Pin Configurations
Pin Description
PIN
NAME FUNCTION
WLP µMAX
A1, B2 6 REF
External Reference Voltage Input. Sets the analog voltage range. Bypass to AGND with a 4.7FF
capacitor.
A2 7 AVDD
Analog +5V Supply Voltage. Bypass to AGND with a 0.1FF capacitor.
A3, B1,
C2
4, 8 AGND Analog Ground
A4 10 SCLK
Serial Clock Input. SCLK drives the conversion process and clocks out data at data rates up to
4.8MHz.
B3 2 DGND Digital Ground
B4 9
CS
Active-Low Chip-Select Input. Forcing CS high places the MAX11100 shutdown with a typical
current of 0.1FA. A high-to-low transition on CS activates normal operating mode and initiates a
conversion.
C1 5 AIN Analog Input
C3 3 DVDD
Digital Supply Voltage. Bypass to DGND with a 0.1FF capacitor.
C4 1 DOUT
Serial Data Output. Data changes state on SCLK’s falling edge. DOUT is high impedance when
CS is high.
MAX11100
TOP VIEW
+
µMAX
2DGND
1DOUT
DVDD 3
AGND
AIN
CS
SCLK
AGND
AVDD
REF
4
5
9
10
8
7
6
MAX11100
TOP VIEW
(BUMP SIDE DOWN)
WLP
DOUTAIN
CSAGND
SCLKREF
+
1 2 34
A
AGND DVDD
REF DGND
AVDD AGND
B
C