Datasheet

4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
12
Maxim Integrated
MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B/MAX11054/MAX11055/MAX11056
Pin Description (continued)
PIN
MAX11044/
MAX11044B
(TQFP-EP)
MAX11045/
MAX11045B
(TQFP-EP)
MAX11046/
MAX11046B
(TQFP-EP)
NAME FUNCTION
1 1 1 DB14 16-Bit Parallel Data Bus Digital Output Bit 14
2 2 2 DB13 16-Bit Parallel Data Bus Digital Output Bit 13
3 3 3 DB12 16-Bit Parallel Data Bus Digital Output Bit 12
4 4 4 DB11 16-Bit Parallel Data Bus Digital Output Bit 11
5 5 5 DB10 16-Bit Parallel Data Bus Digital Output Bit 10
6 6 6 DB9 16-Bit Parallel Data Bus Digital Output Bit 9
7 7 7 DB8 16-Bit Parallel Data Bus Digital Output Bit 8
8, 22, 59 8, 22, 59 8, 22, 59 DGND Digital Ground
9, 21, 60 9, 21, 60 9, 21, 60 DVDD
Digital Supply. Bypass to DGND with a 0.1μF capacitor
at each DVDD input.
10 10 10 DB7 16-Bit Parallel Data Bus Digital Output Bit 7
11 11 11 DB6 16-Bit Parallel Data Bus Digital Output Bit 6
12 12 12 DB5 16-Bit Parallel Data Bus Digital Output Bit 5
13 13 13 DB4 16-Bit Parallel Data Bus Digital Output Bit 4
14 14 14 DB3/CR3
16-Bit Parallel Data Bus Digital Output Bit 3/
Configuration Register Input Bit 3
15 15 15 DB2/CR2
16-Bit Parallel Data Bus Digital Output Bit 2/
Configuration Register Input Bit 2
16 16 16 DB1/CR1
16-Bit Parallel Data Bus Digital Output Bit 1/
Configuration Register Input Bit 1
17 17 17 DB0/CR0
16-Bit Parallel Data Bus Digital Output Bit 0/
Configuration Register Input Bit 0
18 18 18 EOC
Active-Low End-of-Conversion Output. EOC goes low
when conversion is completed. EOC goes high when a
conversion is initiated.
19 19 19 CONVST
C onver t S tar t Inp ut. Ri si ng ed g e of C ON V S T end s
sam p l e and star ts a conver si on on the cap tur ed sam p l e.
The AD C i s i n acq ui si ti on m od e w hen C ON V S T i s l ow
and C ON V S T m od e = 0.
20 20 20 SHDN
Shutdown Input. If SHDN is held high, the entire device
will enter and stay in a low-current state. Contents of
the configuration register are not lost when in the
shutdown mode.
23, 28, 32, 38,
43, 49, 53, 58
23, 28, 32, 38,
43, 49, 53, 58
23, 28, 32, 38,
43, 49, 53, 58
AGNDS
Signal Ground. Connect all AGND and AGNDS inputs
together on PCB.
24, 29, 35, 46,
52, 57
24, 29, 35, 46,
52, 57
24, 29, 35, 46,
52, 57
AVDD
Analog Supply Input. Bypass AVDD to AGND with a
0.1μF capacitor at each AVDD input.
25, 30, 36, 45,
51, 56
25, 30, 36, 45,
51, 56
25, 30, 36, 45,
51, 56
AGND Analog Ground. Connect all AGND inputs together.