Datasheet

MAX1032/MAX1033
8- and 4-Channel, ±3 x V
REF
Multirange Inputs, Serial 14-Bit ADCs
17
Maxim Integrated
Figure 6. Simplified Analog Input Circuit
MAX1032
MAX1033
R2
R1
V
SJ
*R
SOURCE
ANALOG
SIGNAL
SOURCE
R2
R1
V
SJ
*R
SOURCE
ANALOG
SIGNAL
SOURCE
IN_+
IN_+
*MINIMIZE R
SOURCE
TO AVOID GAIN ERROR AND DISTORTION.
CS
SCLK
1 2 3 4 5 6 7 8
17 18 19 20 21 22 23 24
DIN S C2 C1 C0 0 0 0 0
ANALOG INPUT
TRACK AND HOLD*
TRACK
DOUT
B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 X X
BYTE 1 BYTE 2 BYTE 3
SSTRB
INTCLK**
1 2 3
25 26 27 28
9
10 11 12 13 14 15 16
10 11 12 13 14
HOLD HOLD
t
ACQ
100ns to 400ns
f
INTCLK
≈ 4.5MHz
f
SAMPLE
≈ f
SCLK
/ 24 + f
INTCLK
/ 28
*TRACK AND HOLD TIMING IS CONTROLLED BY INTCLK, AND IS NOT ACCESSIBLE TO THE USER.
**INTCLK IS AN INTERNAL SIGNAL AND IS NOT ACCESSIBLE TO THE USER.
SAMPLING INSTANT
HIGH
IMPEDANCE
***
***DIN BYTES 2 TO 4 MUST BE DRIVEN TO LOGIC 0 TO OBTAIN A VALID CONVERSION.
Figure 4. Internal Clock-Mode Conversion (Mode 2)
ANALOG INPUT VOLTAGE (V)
ANALOG INPUT CURRENT (mA)
0
-0.6
-0.2
0.2
0.6
1.0
-1.0
-3 x V
REF
+3 x V
REF
ALL MODES
2
-3 x V
REF
2
+3 x V
REF
Figure 5. Analog Input Current vs. Input Voltage