Datasheet

+Denotes lead(Pb)-free/RoHS-compliant package.
PART TEMP RANGE PIN-PACKAGE
ICL7116CPL 0°C to +70°C 40 PDIP
ICL7116CJL 0°C to +70°C 40 CERDIP
ICL7116CQ 0°C to +70°C 44 LPCC
ICL7116C/D 0°C to +70°C Dice
ICL7117CPL 0°C to +70°C 40 PDIP
ICL7117CJL 0°C to +70°C 40 CERDIP
ICL7117CMH+ 0°C to +70°C 44 MQFP
ICL7117CQ 0°C to +70°C 44 LPCC
ICL7117C/D 0°C to +70°C Dice
N.C.
G2
C3
A3
G3
BP/GND
POL
AB4
E3
F3
B3
N.C.
N.C.
TEST
OSC3
N.C.
OSC2
OSC1
V+
D1
C1
B1
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
44
43 42 41 40 39 38 37 36 35 34
33
32
31
30
29
28
27
26
25
24
23
A1
F1
G1
E1
D2 C2
B2 A2
F2
E2
D3
REF HI V+ C+ REF C- REF COMMON IN HI IN LO A-Z BUFF INT V-
MQFP
ICL7117
TOP VIEW
+
441234 404142
43
5
21 24 26
25
27 2822 2319 20
8
9
10
11
12
13
14
15
16
17
29
30
31
32
33
34
35
36
37
38
D3
E3
B1
PLCC
TOP VIEW
C1 D1 HOLD N.C. OSC1 OSC2 OSC3 TEST REF HI
F3
POL
AB4
BP/GND
N.C.
A3
G3 G2
C3
C+ REF
C- REF
COMMON
IN HI
N.C.
IN LO
A/Z
BUFF
INT
V-
E2
F2
A2
B2
N.C.
C2
D2
E1
G1
7
39 V+F1
6
18
A1B3
ICL7116
ICL7117
ICL7116/ICL7117 3½ Digit ADCs with Display Hold
www.maximintegrated.com
Maxim Integrated │ 7
Chip Information
PROCESS: CMOS
Ordering Information
Pin Congurations (continued)