Users Guide: Network Microcontroller Supplement User Manual

High-Speed Microcontroller User’s
Guide: Network Microcontroller
Supplement
94
7 6543210
SFR FEh
SM0/FE_2
SM1_2 SM2_2 REN_2 TB8_2 RB8_2 TI_2 RI_2
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
76543210
SFR FFh SBUF2.7 SBUF2.6 SBUF2.5 SBUF2.4 SBUF2.3 SBUF2.2 SBUF2.1 SBUF2.0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
Serial Port 2 Control Register (SCON2)
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
SM0/FE_2
Bit 7
Serial port 2 mode bit 0. When SMOD0 is set to 1, it is the framing error flag that is set upon detection
of an invalid stop bit and must be cleared by software. Modification of this bit when SMOD0 is set has
no effect on the serial mode setting.
MODE
SM2
SM1
SM0
FUNCTION
LENGTH
PERIOD
0
0
0
0
Synchronous 8 bits 12 t
CLK
0
1
0
0
Synchronous 8 bits 4 t
CLK
1
—
1
0
Asynchronous 10 bits Timer 3
2
0
0
1
Asynchronous 11 bits
64 t
CLK
(SMOD_1 = 0)
32 t
CLK
(SMOD_1 = 1)
2
1
0
1
Asynchronous (MP)
11 bits
64 t
CLK
(SMOD_1 = 0)
32 t
CLK
(SMOD_1 = 1)
3
0
1
1
Asynchronous 11 bits Timer 3
3
1
1
1
Asynchronous (MP)
11 bits Timer 3
SM1_2
Bit 6
SM2_2
Bit 5
REN_2
Bit 4
TB8_2
Bit 3
RB8_2
Bit 2
TI_2
Bit 1
RI_2
Bit 0
Serial port 2 mode bit 1.
Serial port 2 mode bit 2. Setting of this bit in mode 1 ignores reception if an invalid stop bit is detect-
ed. Setting this bit in mode 2 or 3 enables multiprocessor communications. This prevents the RI_2 bit
from being set and an interrupt being asserted if the 9th bit received is 0.
Receive enable.
REN_0 = 0: Serial port 2 reception disabled.
REN_0 = 1: Serial port 2 receiver enabled for modes 1, 2, and 3. Initiate synchronous reception for mode 0.
9th transmission bit state. This bit defines the state of the 9th transmission bit in serial port 2, modes
2 and 3.
9th received bit state. This bit identifies the state of the 9th bit of received data in serial port 2, modes
2 and 3. When SM2_2 is 0, it is the state of the stop bit in mode 1. This bit has no meaning in mode 0.
Transmit interrupt flag. This bit indicates that the data in the serial port 2 buffer has been completely shift-
ed out. It is set at the end of the last data bit for all modes of operation and must be clear
ed by softwar
e.
Receive interrupt flag. This bit indicates that a data byte has been received in the serial port 2 buffer.
It is set at the end of the 8th bit for mode 0, after the last sample of the incoming stop bit for mode 1
subject to the value of the SM2_2 bit, or after the last sample of RB8_2 for modes 2 and 3. This bit must
be cleared by software.
Serial Data Buffer 2 (SBUF2)
R = Unrestricted read, W = Unrestricted write, -n = Value after reset
SBUF2.7–0
Bits 7–0
Serial data buffer 2. Data for serial port 2 is read from or written to this location. The serial transmit and
receive buffers are separate registers, but both are addressed at this location.
Maxim Integrated