Users Guide: DS80C390 Supplement Manual

High-Speed Microcontroller User’s Guide: DS80C390 Supplement
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CAN 0 MESSAGE CENTER 9 CONTROL REGISTER (C0M9C)
7 6 5 4 3 2 1 0
SFR B6h MSRDY ETI ERI INTRQ EXTRQ MTRQ ROW/TIH DTUP
RW-0 RW-0 RW-0 RW-0 RC-0 R*-0 R*-0 R*-0
R = Unrestricted Read, C = Clear Only, * = See description below, -n = Value after Reset
C0M9C
Bits 7-0
Operation of the bits in this register are identical to those found in the CAN 0
Message One Control Register (C0M1C;ABh). Please consult the description
of that register for more information.
CAN 0 MESSAGE CENTER 10 CONTROL REGISTER (C0M10C)
7 6 5 4 3 2 1 0
SFR B7h MSRDY ETI ERI INTRQ EXTRQ MTRQ ROW/TIH DTUP
RW-0 RW-0 RW-0 RW-0 RC-0 R*-0 R*-0 R*-0
R = Unrestricted Read, C = Clear Only, * = See description below, -n = Value after Reset
C0M10C
Bits 7-0
Operation of the bits in this register are identical to those found in the CAN 0
Message One Control Register (C0M1C;ABh). Please consult the description
of that register for more information.
INTERRUPT PRIORITY (IP)
7 6 5 4 3 2 1 0
SFR B8h PS1 PT2 PS0 PT1 PX1 PT0 PX0
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
R = Unrestricted Read, W = Unrestricted Write, -n = Value after Reset
Bit 7 Reserved. Read data is indeterminate.
PS1
Bit 6
Serial Port 1 Interrupt. This bit controls the priority of the serial port 1
interrupt.
0 = Serial port 1 priority is determined by the natural priority order.
1 = Serial port 1 is a high priority interrupt.
PT2
Bit 5
Timer 2 Interrupt. This bit controls the priority of Timer 2 interrupt.
0 = Timer 2 is determined by the natural priority order.
1 = Timer 2 is a high priority interrupt.
PS0
Bit 4
Serial Port 0 Interrupt. This bit controls the priority of the serial port 0
interrupt.
0 = Serial port 0 priority is determined by the natural priority order.
1 = Serial port 0 is a high priority interrupt.
PT1
Bit 3
Timer 1 Interrupt. This bit controls the priority of Timer 1 interrupt.
0 = Timer 1 is determined by the natural priority order.
1 = Timer 1 is a high priority interrupt.
PX1
Bit 2
External Interrupt 1. This bit controls the priority of external interrupt 1.
0 = External interrupt 1 is determined by the natural priority order.
1 = External interrupt 1 is a high priority interrupt.