Datasheet
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers 
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EXPLANATION OF AC SYMBOLS 
In an effort to remain compatible with the original 8051 family, the DS87C520 and DS83C520 specify 
the same parameters as such devices, using the same symbols. For completeness, the following is an 
explanation of the symbols. 
t  Time 
A  Address 
C  Clock 
D  Input data 
H  Logic level high 
L  Logic level low 
I  Instruction 
P  PSEN 
Q  Output data 
R  RD signal 
V  Valid 
W  WR signal 
X  No longer a valid logic 
level 
Z  Tri-State
POWER-CYCLE TIMING CHARACTERISTICS 
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES 
Cycle Startup Time  t
CSU
  1.8 ms 1 
Power-On Reset Delay  t
POR
   65,536 t
CLCL
 2 
Note 1:  Startup time for crystals varies with load capacitance and manufacturer. Time shown is for an 11.0592MHz crystal 
manufactured by Fox. 
Note 2:  Reset delay is a synchronous counter of crystal oscillations after crystal startup. Counting begins when the level 
on the XTAL1 pin meets the V
IH2
 criteria. At 33MHz, this time is 1.99ms. 
EPROM PROGRAMMING AND VERIFICATION 
(V
CC
 = 4.5V to 5.5V, T
A
 = +21C to +27°C.) 
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES 
Programming Voltage  V
PP
 12.5 13.0 V 1 
Programming Supply Current  I
PP
   50 mA  
Oscillator Frequency  1/t
CLCL
 4 6 MHz  
Address Setup to 
PROG
 Low 
t
AVGL
 48t
CLCL
Address Hold after  PROG  
t
GHAX
 48 t
CLCL
Data Setup to  PROG  Low 
t
DVGL
 48 t
CLCL
Data Hold after  PROG  
t
GHDX
 48 t
CLCL
Enable High to V
PP
  t
EHSH
 48 t
CLCL
V
PP
 Setup to  PROG  Low 
t
SHGL
 10      μs 
V
PP
 Hold after  PROG  
t
SHGL
 10      μs 
PROG  Width 
t
GLGH
 90    110 μs 
Address to Data Valid  t
AVQV
   48 t
CLCL
Enable Low to Data Valid  t
ELQV
   48 t
CLCL
Data Float after Enable  t
EHQZ
 0   48 t
CLCL
PROG  High to  PROG Low 
t
GHGL
 10      μs 
Note 1: 
All voltages are referenced to ground. 










