Datasheet

DS8007
Table 3. Timeout Counter Configurations (continued)
TOC VALUE TOR3 TOR2 TOR1 DESCRIPTION
71h Start Bit Stopped
Counter 1 is stopped. Counters 3 and 2 form a 16-bit counter
operating in start bit mode for both transmission and reception.
TOR3 and TOR2 registers can be changed during the count, the
current count is not affected, and the values are taken into account
at the next START bit detected on the I/Ox pin. Setting TOC = 00h
stops the counters.
75h Start Bit
Start
Bit/Autoreload
Counter 1 is an 8-bit counter in start-bit/autoreload mode for both
transmission and reception; counters 3 and 2 form a 16-bit counter
operating in start-bit mode for both transmission and reception. The
TOR1 register is not allowed to change during the count. TOR3,
TOR2 registers can be changed during the count, the current count
is not affected, and the values are taken into account at the next
START bit detected on the I/Ox pin. Setting TOC = 00h stops the
counters.
7Ch Start Bit
Counters 1/2/3 form a 24-bit counter operating in start-bit mode in
both transmission and reception. TOR3, TOR2 and TOR1 registers
can be changed during the count, the current count is not affected,
and the value is taken into account at the next START bit detected on
the I/Ox pin. Setting TOC = 00h stops the counter.
85h Stopped
Start
Bit/Autostop
(RCV);
Start
Bit/Autoreload
(XMT)
Counters 3 and 2 are stopped. Counter 1 is operated in start-
bit/autostop mode in reception and is stopped at the end of the 12th
ETU following the first received START bit detected on the I/Ox pin
unless the terminal count is reached first. Counter 1 operates in start-
bit/autoreload mode in transmission.
E5h Software
Start
Bit/Autostop
(RCV);
Start
Bit/Autoreload
(XMT)
Counters 3 and 2 form a 16-bit counter operating in software mode.
The counters are stopped by setting TOC = 05h before reloading
new values in TOR3 and TOR2 registers. Counter 1 is operated in
autostop mode in reception and is stopped at the end of the 12th
ETU following the first received START bit detected on the I/Ox pin
unless the terminal count is reached first. Counter 1 is operated in
start-bit/autoreload mode in transmission.
F1h
Start Bit/Autostop
(RCV);
Start Bit (XMT)
Stopped
Counter 1 is stopped. Counters 3 and 2 form a 16-bit counter. The
16-bit counter is operated in start-bit/auto-stop mode in reception
and is stopped at the end of the 12th ETU following the first received
START bit detected on the I/Ox pin unless the terminal count is
reached first; and the 16-bit counter is operated in start-bit mode in
transmission.
F5h
Start Bit/Autostop
(RCV);
Start Bit (XMT)
Start
Bit/Autostop
(RCV);
Start
Bit/Autoreload
(XMT)
Counter 1 is an 8-bit counter operating in start-bit/autostop mode in
reception and is stopped at the end of the 12th ETU following the
first received START bit detected on the I/Ox pin unless the terminal
count is reached first; and the 8-bit counter is operated in start-
bit/autoreload mode in transmission. Counters 3 and 2 form a 16-bit
counter operating in start-bit mode for transmission but operate in
start-bit/autostop mode in reception. Counters 3 and 2 are stopped
at the end of the 12th ETU following the first received START bit
detected on the I/Ox pin unless the terminal count is reached first;
the counters are stopped by setting TOC = 00h.
Multiprotocol Dual Smart Card Interface
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