Datasheet

DS75LX: Digital Thermometer and Thermostat with Extended Addressing
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Writing to the DS75LX
To write to the DS75LX, the master must generate a START followed by an address byte containing the DS75LX
bus address. The value of the R/W¯¯ bit must be a 0, which indicates that a write is about to take place. The DS75LX
responds with an ACK after receiving the address byte. This must be followed by a pointer byte from the master,
which tells the DS75LX which register is being written to. The DS75LX again responds with an ACK after receiving
the pointer byte. Following this ACK the master device must immediately begin transmitting data to the DS75LX.
When writing to the configuration register, the master must send one byte of data (see Figure 8a), and when writing
to the T
OS
or T
HYST
registers the master must send two bytes of data (see Figure 8b). After receiving each data
byte, the DS75LX responds with an ACK, and the transaction is finished with a STOP from the master.
Software POR
The soft POR command is hex 54. Issue a write command to the DS75LX. It responds with an ACK. If the next
byte is a 0x54, the DS75LX will reset as if power had been cycled. No ACK is sent by the IC after the POR
command is received.
Reading from the DS75LX
When reading from the DS75LX, if the pointer was already pointed to the desired register during a previous
transaction, the read can be performed immediately without changing the pointer setting. In this case the master
sends a START followed by an address byte containing the DS75LX bus address. The R/W¯¯ bit must be a 1, which
tells the DS75LX that a read is being performed. After the DS75LX sends an ACK in response to the address byte,
the DS75LX begins transmitting the requested data on the next clock cycle. When reading from the configuration
register, the DS75LX transmits one byte of data, after which the master must respond with a NACK followed by a
STOP (see Figure 8c). For 2-byte reads (i.e., from the temperature, T
OS
, or T
HYST
register), the DS75LX transmits
two bytes of data, and the master must respond to the first data byte with an ACK and to the second byte with a
NACK followed by a STOP (see Figure 8d). If only the most significant byte of data is needed, the master can issue
a NACK followed by a STOP after reading the first data byte, in which case the transaction will be the same as for
a read from the configuration register.
If the pointer is not already pointing to the desired register, the pointer must first be updated as shown in Figure 8e,
which shows a pointer update followed by a single-byte read. The value of the R/W¯¯ bit in the initial address byte is
a 0 (“write”) since the master is going to write a pointer byte to the DS75LX. After the DS75LX responds to the
address byte with an ACK, the master sends a pointer byte that corresponds to the desired register. The master
must then perform a repeated START followed by a standard 1- or 2-byte read sequence (with R/W¯¯ = 1) as
described in the previous paragraph.
PACKAGE INFORMATION
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package
outline information, go to
www.maxim-ic.com/DallasPackInfo.)
PACKAGE DOCUMENT NO.
8-Pin SO 56-G2008-001
8-Pin µSOP/µMAX 21-0036