Datasheet

DS5002FP Secure Microprocessor Chip
23 of 25
Figure 14. Connection to 64k x 8 SRAM
POWER MANAGEMENT
The DS5002FP monitors V
CC
to provide power-fail reset, early warning power-fail interrupt, and switchover to
lithium backup. It uses an internal bandgap reference in determining the switch points. These are called V
PFW
,
V
CCMIN
, and V
LI
respectively. When V
CC
drops below V
PFW
, the DS5002FP will perform an interrupt vector to location
2Bh if the power-fail warning was enabled. Full processor operation continues regardless. When power falls further
to V
CCMIN
, the DS5002FP invokes a reset state. No further code execution is performed unless power rises back
above V
CCMIN
. All decoded chip enables and the R/W signal go to an inactive (logic 1) state. V
CC
is still the power
source at this time. When V
CC
drops further to below V
LI
, internal circuitry switch to the lithium cell for power. The
majority of internal circuits will be disabled and the remaining nonvolatile states will be retained. Any devices
connected V
CCO
will be powered by the lithium cell at this time. V
CCO
is at the lithium battery voltage minus
approximately 0.45V (less a diode drop). This drop varies depending on the load. Low-power SRAMs should be
used for this reason. When using the DS5002FP, the user must select the appropriate battery to match the RAM
data retention current and the desired backup lifetime. Note that the lithium cell is only loaded when V
CC
< V
LI
. The
Secure Microcontroller User’s Guide has more information on this topic. The trip points V
CCMIN
and V
PFW
are listed
in the electrical specifications.