Datasheet

DS4M125/DS4M133/DS4M200
3.3V Margining Clock Oscillator with
LVPECL/LVDS Output
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 3.135V to 3.465V, T
A
= -40°C to +85°C, unless otherwise noted.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LVPECL
Output High Voltage (Note 2) V
OH
Output connected to 50 at PECL_BIAS
at V
CC
- 2.0V
V
CC
-
1.085
V
CC
-
0.88
V
Output Low Voltage (Note 2) V
OL
Output connected to 50 at PECL_BIAS
at V
CC
- 2.0V
V
CC
-
1.825
V
CC
-
1.62
V
Differential Voltage V
DIFF_PECL
Output connected to 50 at PECL_BIAS
at V
CC
- 2.0V
0.595 0.710 V
Rise Time t
R-PECL
20% to 80% 200 ps
Fall Time t
F-PECL
80% to 20% 200 ps
Duty Cycle D
CYCLE_PECL
45 55 %
Propagation Delay from OE Going
LOW to Output Three-Stated
t
PAZ
(Figure 3) 200 ns
Propagation Delay from OE Going
HIGH to Output Active
t
PZA
(Figure 3) 200 ns
Note 1: Limits at -40°C are guaranteed by design and are not production tested. Typical values are at +25°C and 3.3V, unless
otherwise noted.
Note 2: AC parameters are guaranteed by design and characterization and are not production tested.
Note 3: Frequency stability is calculated as: Δf
TOTAL
= Δf
INITIAL
+ Δf
TEMP
+ (Δf
VCC
x 0.165) + Δf
LOAD
+ Δf
AGING
.
Note 4: Supply induced jitter is measured with a 50mV
P-P
sine wave forced on V
CC
. Deterministic jitter is calculated by measuring
the power of the resulting tone seen on a spectrum analyzer.
Note 5: Voltage referenced to ground.
SINGLE-SIDEBAND PHASE NOISE AT f
O
= f
NOM
(dBc/Hz)
f
M
=
125MHz 133.33MHz 200MHz
10Hz -70 -75 -70
100Hz -100 -105 -100
1kHz -118 -121 -115
10kHz -118 -122 -117
100kHz -124 -126 -122
1MHz -142 -141 -138
10MHz -150 -150 -150
20MHz -150 -150 -150
SINGLE-SIDEBAND PHASE NOISE AT f
O
= f
NOM