Datasheet

DS4830
Optical Microcontroller
16Maxim Integrated
Pin Description (continued)
Note: Bypass V
DD
, REG285, and REG18 each with a 1µF X5R and 10nF capacitors to ground. All input-only pins and open-drain
outputs are high impedance after V
DD
exceeds V
BO
and prior to code execution. Pins configured as GPIO have a weak internal
pullup. See the Selectable Functions table for more information.
Selectable Functions
PIN NAME
INPUT
STRUCTURE(S)
OUTPUT
STRUCTURE
POWER-ON
STATE
SELECTABLE FUNCTIONS
(FIRST COLUMN IS DEFAULT FUNCTION)
PORT
40 DACPW7 Digital Push-Pull 55µA Pullup
DAC7, FS
= REFINB
or Internal
Reference
PW7 — — P2.7
— EP
Exposed Pad
(Connect to GND)
— GND — — — — —
FUNCTION NAME DESCRIPTION
ADC-D[7:0][P/N] Differential Inputs to ADC. Also used for external temperature sensors.
ADC-REFIN[A/B] REFINA and REFINB Monitor Inputs to ADC
ADC-S[15:0] Single-Ended Inputs to ADC
ADC-SH[P/N][1:0] Sample/Hold Inputs 1 and 0
ADC-VDD V
DD Monitor Input to ADC
DAC[7:0] Voltage DAC Outputs
MCL, MCS, MDIO
Maxim Proprietary 3-Wire Interface, MCL (Clock), MCS (Chip Select), MDIO (Data). Used to
control the MAX3798 family of high-speed laser drivers.
MSCL, MSDA I
2
C Master Interface: MSCL (I
2
C Master Slave), MSDA (I
2
C Master Data)
MSPICK, MSPICS, MSPIDI,
MSPIDO
SPI Master Interface: MSPICK (Clock), MSPICS (Active-Low Chip Select), MSPIDI (Data In),
MSPIDO (Data Out)
P0.n, P1.n, P2.n, P6.n General-Purpose Inputs/Outputs. Can also function as interrupts.
PW[9:0] PWM Outputs
RST
Used by JTAG and as Active-Low Reset for Device
SCL, SDA
I
2
C Slave Interface: SCL (I
2
C Slave Clock), SDA (I
2
C Slave Data). These also function as a
password-protected programming interface.
SHEN[1:0] Sample/Hold Enable Inputs. Can also function as interrupts.
SSPICK, SSPICS, SSPIDI,
SSPIDO
SPI Slave Interface: SSPICK (Clock), SSPICS (Active-Low Chip Select), SSPIDI (Data In), SSPIDO
(Data Out). In SPI slave mode, the I
2
C slave interface is disabled.
TCK, TDI, TDO, TMS
JTAG Interface Pins. Also includes RST.