Datasheet

DS4550
I
2
C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory
6 _____________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 I/O_0 Input/Output 0. Bidirectional I/O pin.
2 I/O_1 Input/Output 1. Bidirectional I/O pin.
3 I/O_2 Input/Output 2. Bidirectional I/O pin.
4 I/O_3 Input/Output 3. Bidirectional I/O pin.
5 I/O_4 Input/Output 4. Bidirectional I/O pin.
6A0I
2
C Address Input. Inputs A0, A1, and A2 determine the I
2
C slave address of the device.
7A1I
2
C Address Input. Inputs A0, A1, and A2 determine the I
2
C slave address of the device.
8 TCK
JTAG Test Clock. This signal is used to shift data into TDI on the rising edge and out of TDO on the
falling edge.
9 TMS
JTAG Test Mode Select. This pin is sampled on the rising edge of TCK and used to place the TAP
into the various defined JTAG states. This pin has an internal pullup resistor.
10 V
CC
Power Supply Voltage
11 SDA I
2
C Serial Data Open-Drain Input/Output
12 SCL I
2
C Serial Clock Input
13 TDI
JTAG Test Data Input. Test instructions and data are clocked into this pin on the rising edge of TCK.
This pin has an internal pullup resistor.
14 TDO
JTAG Test Data Output. Test instructions and data are clocked out of this pin on the falling edge of
TCK. If not used, this pin should be left open circuit.
15 A2 I
2
C Address Input. Inputs A0, A1, and A2 determine the I
2
C slave address of the device.
16 I/O_5 Input/Output 5. Bidirectional I/O pin.
17 I/O_6 Input/Output 6. Bidirectional I/O pin.
18 I/O_7 Input/Output 7. Bidirectional I/O pin.
19 I/O_8 Input/Output 8. Bidirectional I/O pin.
20 GND Ground