Datasheet

DS4550
I
2
C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory
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Table 3. Boundary Scan Control Bits [33 Bits]
CELL
NUMBER
NAME TYPE
32 A2 input Input Observe Only
31 A1 input Input Observe Only
30 A0 input Input Observe Only
29 SCL input Input Observe Only
28 SDA input Input Observe Only
27 SDA output Output
26 IO8 pubout Output
25 IO8 pdbout Output
24 IO8 input Input Observe Only
23 IO7 pubout Output
22 IO7 pdbout Output
21 IO7 input Input Observe Only
20 IO6 pubout Output
19 IO6 pdbout Output
18 IO6 input Input Observe Only
17 IO5 pubout Output
16 IO5 pdbout Output
Table 4. EEPROM Read Cycle
STEP TAP STATE COMMENTS
Select-IR-Scan 
Capture-IR 
Shift-IR (4 x TCK) The 4-bit instruction is shifted in through TDI.
Exit1-IR 
Select
Address
Register
Update-IR 
Select-DR-Scan 
Capture-DR No-op.
Shift-DR (8 x TCK) The 8-bit address is shifted in through TDI.
Exit1-DR 
Load
EEPROM
Address
Update-DR The shifted 8-bit Address Register data is output latched.
Select-IR-Scan 
Capture-IR 
Shift-IR (4 x TCK) The 4-bit instruction is shifted in through TDI.
Exit1-IR 
Select
Read
Register
Update-IR 
Select-DR-Scan 
Capture-DR The 8-bit EEPROM data is loaded into the EEPROM Read Register.
Shift-DR (8 x TCK) The 8-bit data is shifted out through TDO.
Exit1-DR 
Read
EEPROM
Data
Update-DR No-op.
CELL
NUMBER
NAME TYPE
15 IO5 input Input Observe Only
14 IO4 pubout Output
13 IO4 pdbout Output
12 IO4 input Input Observe Only
11 IO3 pubout Output
10 IO3 pdbout Output
9 IO3 input Input Observe Only
8 IO2 pubout Output
7 IO2 pdbout Output
6 IO2 input Input Observe Only
5 IO1 pubout Output
4 IO1 pdbout Output
3 IO1 input Input Observe Only
2 IO0 pubout Output
1 IO0 pdbout Output
0 IO0 input Input Observe Only