Datasheet

DS3904/DS3905
Detailed Description
The DS3904/DS3905 contain three, 128-position, NV,
low temperature coefficient, variable digital resistors. All
three resistors also feature a Hi-Z function. The variable
resistor registers (F8h, F9h, and FAh) are factory pro-
grammed with a default value of 7Fh. They are con-
trolled through a 2-wire serial interface, and can serve
as a low-cost replacement for designs using conven-
tional trimming resistors. Furthermore, the DS3904
address pin (A0) allows two DS3904s to be placed on
the same 2-wire bus. The three address pins on the
DS3905 allow up to eight DS3905s to be placed on the
same 2-wire bus.
With their low cost and small size, the DS3904/DS3905
are well tailored to replace larger mechanical trimming
variable resistors. This allows the automation of calibra-
tion in many instances because the 2-wire interface can
easily be adjusted by test/production equipment.
Variable Resistor Memory Organization
The variable resistors of the DS3904/DS3905 are
addressed by communicating with the registers in
Table 1.
Using the Resistor as a Switch
By taking advantage of the high-impedance mode, a
switch can be created to produce a digital output.
Setting a resistor register to 00h creates the low state.
Writing 80h into the same resistor register enables the
high-impedance state. When used with an external
pullup resistor, such as a 4.7kΩ pullup, a high state
is generated.
Device Operation
Clock and Data Transitions
The SDA pin is normally pulled high with an external
resistor or device. Data on the SDA pin can only change
during SCL low time periods. Data changes during SCL
high periods indicate a start or stop condition depend-
ing on the conditions discussed below. See the timing
diagrams for further details (Figures 2 and 3).
Start Condition
A high-to-low transition of SDA with SCL high is a start
condition, which must precede any other command. See
the timing diagrams for further details (Figures 2 and 3).
Stop Condition
A low-to-high transition of SDA with SCL high is a stop
condition. After a read or write sequence, the stop com-
mand places the DS3904/DS3905 into a low-power
mode. See the timing diagrams for further details
(Figures 2 and 3).
Acknowledge
All address and data bytes are transmitted through a
serial protocol. The DS3904/DS3905 pull the SDA line
low during the ninth clock pulse to acknowledge that
they have received each byte.
Standby Mode
The DS3904/DS3905 feature a low-power mode that is
automatically enabled after power-on, after a stop com-
mand, and after the completion of all internal operations.
Pin Description
PIN
NAME
DS3904 DS3905
DESCRIPTION
SDA 1 2
2-Wire Serial Data. Open-drain
input/output for 2-wire data.
SCL 2 3
2-Wire Serial Clock. Input for
2-wire clock.
V
CC
3 4 Supply Voltage Terminal
GND 4 5 Ground Terminal
H2 5 6 Resistor 2 High Terminals
H1 6 7 Resistor 1 High Terminals
H0 7 8 Resistor 0 High Terminals
A0 8 9 Address-Select Pin
A1 — 1 Ad d r ess- S el ect P i n ( D S 3905 Onl y)
A2 — 10 Ad d r ess- S el ect P i n ( D S 3905 Onl y)
Triple 128-Position Nonvolatile Digital
Variable Resistor/Switch
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Table 1. Variable Resistor Registers
ADDRESS
VARIABLE
RESISTOR
POSITION 7Fh
RESISTANCE
NUMBER OF
POSITIONS*
F8h Resistor 0
20k
(nominal)
128 (00h to
7Fh) + Hi-Z
F9h Resistor 1
20k or 10k
(nominal)
128 (00h to
7Fh) + Hi-Z
FAh Resistor 2
20k
(nominal)
128 (00h to
7Fh) + Hi-Z
* Writing a value greater than 7Fh to any of the resistor registers
sets the high-impedance mode control bit (RHIZ, the MSB of
the resistor register) resulting in the resistor going into high-
impedance mode. Position 0 is the minimum position. Position
7Fh is the maximum position.