Datasheet

DS3882

Dual-Channel Automotive CCFL Controller

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Pin Description (continued)

NAME

PIN FUNCTION

POSC

DPWM Oscillator Resistor Adjust. A resistor to ground on this lead sets the frequency of the DPWM

oscillator. This lead can optionally accept a 22.5Hz to 440Hz clock that will become the source timing of

the internal DPWM signal.

A1 10 Address Select Input. Determines I

C slave address.

GND_S

11 I

C Interface Ground Connection. GND_S must be at the same potential as GND.

SVML

12 Low-Supply Voltage Monitor Input. Used to monitor the inverter voltage for undervoltage conditions.

SVMH

13 High-Supply Voltage Monitor Input. Used to monitor the inverter voltage for overvoltage conditions.

14, 24 Power-Supply Connections. Both pins must be connected.

N.C. 19 No Connection. Do not connect any signal to this pin.

STEP

Lamp Frequency Step Input. This active-high digital input moves the lamp oscillator frequency up or

down by 1%, 2%, 3%, or 4% as configured in the EMIC register. This pin is logically ORed with

the STEPE bit in the EMIC register.

GND

21 Ground Connection

LCO 22

Lamp Current Overdrive Enable Input. A high digital level at this input enables the lamp current

overdrive circuit. The amount of overdrive current is configured by the LCOC register. When this input is

low, the lamp current is set to its nominal level. This pin is logically ORed with the LCOE bit in the LCOC

PDN 23

Lamp On/Off Control Input. A low digital level at this input turns the lamp on. A high digital level turns the

lamps off, clears the fault logic, and places the device into the power-down mode. The high-to-low

transition on this input issues a controller reset, which clears the fault logic and reinitiates a lamp strike.

This pin is logically ORed with the PDNE bit in the CR2 register.