Datasheet
DS3882
Dual-Channel Automotive CCFL Controller
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Table 5a. Soft-Start Protocol Registers (SSPx) [Shadowed-EEPROM, F0h, F1h, F2h, F3h]
MSB LSB
SSP# ADDR
FACTORY
DEFAULT
7 654 3 2 1 0
SSP1 F0h 21h LST1 Lamp Cycles 3 and 4 LST0 Lamp Cycles 1 and 2
SSP2 F1h 43h RSVD Lamp Cycles 7 and 8 RSVD Lamp Cycles 5 and 6
SSP3 F2h 65h RSVD Lamp Cycles 11 and 12 RSVD Lamp Cycles 9 and 10
SSP4 F3h 77h RSVD Lamp Cycles 15 and 16 RSVD Lamp Cycles 13 and 14
Table 5b. MOSFET Duty Cycle (MDC)⎯Codes for Soft-Start Settings
BIT R/W NAME FUNCTION
0 R/W MDC0
MDC0/1/2: These bits determine a MOSFET duty cycle that will repeat twice in the
16 lamp cycle soft-start.
1 R/W MDC1
MDC CODE MOSFET DUTY CYCLE MDC CODE MOSFET DUTY CYCLE
0h Fixed at 0% 4h Fixed at 13%
2 R/W MDC2
1h Fixed at 3% 5h Fixed at 16%
2h Fixed at 6% 6h Fixed at 19%
3h Fixed at 9% 7h Most Recent Value
3 R/W LST0 / RSVD
4 R/W MDC0
LST0/1: These bits select strike and lamp-out timeout. LST0 and LST1
control fault behavior for all lamps.
5 R/W MDC1 LST1 LST0
STRIKE AND LAMP-OUT TIMEOUT
(LAMP FREQUENCY CYCLES)
EXAMPLE TIMEOUT IF
LAMP FREQUENCY IS 50kHz
0 0 32,768 0.66 Seconds
6 R/W MDC2
0 1 65,536 1.31 Seconds
1 0 98,304 1.97 Seconds
7 R/W LST1 / RSVD
1 1 Reserved —