Datasheet

DS3881

Single-Channel Automotive CCFL Controller

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Table 6. Control Register 2 (CR2) [Shadowed-EEPROM, F5h]

BIT R/W DEFAULT NAME FUNCTION

0 R/W 0 UMWP

User Memory Write Protect

0 = Write access blocked.

1 = Write access permitted.

1 R/W 0 POSCR0

DPWM Oscillator Range Select. When using an external source for the dimming clock,

these bits must be set to match the external oscillator’s frequency. When using a

resistor to set the dimming frequency, these bits plus the external resistor control the

frequency.

POSCR1 POSCR0

DIMMING CLOCK (DPWM)

FREQUENCY RANGE (Hz)

k (kΩ • kHz)

0 0 22.5 to 55.0 1

0 1 45 to 110 2

1 0 90 to 220 4

2 R/W 0 POSCR1

1 1 180 to 440 8

Lamp Sample Rate Select. Determines the feedback sample rate of the LCM inputs.

LSR1 LSR0

SELECTED LAMP SAMPLE

RATE

EXAMPLE SAMPLE RATE

IF LAMP FREQUENCY IS

50kHz

3 R/W 1 LSR0

0 0 4 Lamp Frequency Cycles 12,500Hz

0 1 8 Lamp Frequency Cycles 6250Hz

1 0 16 Lamp Frequency Cycles 3125Hz

4 R/W 0 LSR1

1 1 32 Lamp Frequency Cycles 1563Hz

5 — 0 RSVD Reserved. This bit should be set to zero.

6 — 0 RSVD Reserved. This bit should be set to zero.

7 R/W 0 PDNE

Power-Down. Logically ORed with the PDN pin. Setting this bit high resets the controller,

clears the fault logic, and places the part in power-down mode. 0 = Normal. All circuitry is

off, except I

C interface.