Datasheet

DS3514
I
2
C Gamma and V
COM
Buffer with EEPROM
10 ______________________________________________________________________________________
Block Diagram
LATCH B
LATCH A
MUX
10-BIT
DAC
0
1
MODE1 BIT
0
1
MODE0 BIT
LD
GHM
GHH
10 BITS
GM14 BANK A
GM14 BANK B
GM14 BANK C
GM14 BANK D
S0/S1 PINS
S0/S1 BITS
I
2
C
COMP
BANKS
GM14
GHHGHH
GHM
GLM
GLL
GHM
LATCH B
LATCH A
MUX
10-BIT
DAC
0
1
MODE1 BIT
0
1
MODE0 BIT
LD
GHM
GHH
10 BITS
GM8 BANK A
GM8 BANK B
GM8 BANK C
GM8 BANK D
S0/S1 PINS
S0/S1 BITS
I
2
C
COMP
BANKS
GM8
LATCH B
LATCH A
MUX
10-BIT
DAC
0
1
MODE1 BIT
0
1
MODE0 BIT
LD
GLL
GLM
10 BITS
GM7 BANK A
GM7 BANK B
GM7 BANK C
GM7 BANK D
S0/S1 PINS
S0/S1 BITS
I
2
C
COMP
BANKS
GM7
GLM
GLL
LATCH B
LATCH A
MUX
10-BIT
DAC
0
1
MODE1 BIT
0
1
MODE0 BIT
LD
GLL
GLM
10 BITS
GM1 BANK A
GM1 BANK B
GM1 BANK C
GM1 BANK D
S0/S1 PINS
S0/S1 BITS
I
2
C
COMP
BANKS
GM1
LATCH B
LATCH A
MUX
8-BIT
DAC
0
1
MODE1 BIT
0
1
MODE0 BIT
LD
VRL
VRH
8 BITS
VCOM BANK A
VCOM BANK B
VCOM BANK C
VCOM BANK D
S0/S1 PINS
S0/S1 BITS
I
2
C
COMP
BANKS
V
COM
LOGIC
AND
CONTROL
MODE0 BIT (CR.0)
I
2
C
INTERFACE
I
2
C
COMPENSATION
COMP
MODE1 BIT (CR.1)
S0/S1 PINS
S0/S1 BITS (SOFT S0/S1)
LD
SDA
SCL
A0
S0
S1
LD
VCAP
V
DD
V
DD
V
CC
V
CC
GND
DS3514