Datasheet
____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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19
Data Sheet Revision History
Date Description
04/20/07 Initial Release
07/11/08
Major revision. Extensive clean-up and corrections throughout. Many clarifications and cross-
references added. Some structural reorganization.
Added G.8261 to list of ITU-T References on page 1.
Changed number of pointers for ETH to CPU queue and pool from 64 each to 128 each (section
10.6.11.14).
Max aggregat
e rate of 18.6 Mbps rather than 9.3 (section 7).
Added bo
ard design section (16.1).
Cha
nged SSMII AC timing T172 max from 7ns to 5ns and T175 min from 2.8ns to 1.5ns. This
creates an errata, but matches the SMII specification. Changed T172 min from 1.2ns to 1.5ns.
In Table 14-8, chang
ed T102 and T110 min to 1.1ns.
Changed Figure 10-68 an
d Table 10-59 to show the latest recommended LIU external components.
In section 18, change
d TEBGA theta-JA and theta-JB numbers for to match data from new IC
assembly contractor.
10/1/08
In the Ordering Information table on page 1, removed the asterisks and footnotes that indicated
DS34T101, DS34T102 and DS34T104 were future products.
In Table 11-11, Table 11-13, and
Table 11-14 and corrected the index variable in the Description
column from n to ts to match the other columns.
Updated Figure 6-1 and Figure 8-1 to show all
CPU interface pins including SPI bus pin names.
In section 11.4.8, chan
ged the index into the jitter buffer control registers from j = 0 to 255 to port = 1
to 8 and ts = 0 to 31 for additional clarity.
In the register field description for GCR1.INTMO
DEn and in section 8.1 added notes to indicate that
these bit are only available on the DS34T108.
10/14/08
Removed all references to AAL2 mode.
Replaced the incorrect terms “cell” and “cells” with “AAL1 SAR PDU” throughout the document
except in register names and register field names.
Edited section 10.6.6 for a
dditional clarity about the AAL1 mapping methods.
Corrected some spelling errors and other minor typos.
8/19/09
Corrected typo in Table 16-1, row P4, column DS34T104.