Datasheet
____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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16.4
DS34T104 Pin Assignment
Figure 16-3. DS34T104 Pin Assignment (TE-CSBGA Package)
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A
RTIP3 RRING3 RSYNC3 RLOF/RLOS2 RSYNC1 RDATF1 TTIP2 ATVSS2 RTIP2 ARVSS2 RESREF
B
ARVSS3 ARVDD3 TSER3 TDATF3 TCLKO2 TCLKF1 TRING2 ATVDD2 RRING2 ARVDD2 DVDDC
C
TTIP3 TRING3 DVDDLIU DVDDC RDATF3 RSYSCLK1 TDATF1 TSYSCLK1/ECLK1 RCLKF2/RCLK2 NC TDM1_RSIG_RTS
D
ATVDD3 ATVSS3 RSER4 DVSS RLOF/RLOS4 RSER2 RCLKF4/RCLK4 TCLKF3 TSER1 TDM1_RX TDM1_RX_SYNC
E
RTIP4 RRING4 DVSSLIU RF/RMSYNC4 DVDDC TCLKO4 RF/RMSYNC2 TSYNC/TSSYNC2 TDM2_ACLK TDM1_ACLK TDM1_TSIG_CTS
F
ARVSS4 ARVDD4 TSER4 RDATF4 TSYNC/TSSYNC4 DVSS TSYSCLK3/ECLK3 RSYSCLK3 TDM3_TX_MF_CD TDM2_TX_MF_CD TDM2_TSIG_CTS
G
TTIP4 TRING4 TST_CLD RF/RMSYNC3 DVDDC TSYSCLK4/ECLK4 TSYNC/TSSYNC3 TSYSCLK2/ECLK2 TDM3_TCLK TDM2_TCLK TDM2_TX
H
ATVSS4 ATVDD4 TXENABLE RLOF/RLOS3 RSYSCLK4 RSYNC4 RSER3 DVSS TDM4_RX TDM4_TX_SYNC TDM4_TCLK
J
CLK_SYS/SCCLK CLK_SYS_S TEST_CLK TSER2 RSER1 TCLKF4 TCLKO3 TDATF2 TDM4_TX DVDDIO DVDDIO
K
ACVSS2 ACVDD2 JTMS TCLKF2 RCLKF3/RCLK3 TDATF4 RSYSCLK2 RF/RMSYNC1 DVDDIO DVSS DVSS
L
CLK_HIGH DVDDC JTCLK RCLKF1/RCLK1 TSYNC/TSSYNC1 RSYNC2 RDATF2 TCLKO1 DVDDIO DVSS DVSS
M
ACVSS1 ACVDD1 JTDI NC NC TST_RB TST_TC RLOF/RLOS1 DVDDIO DVSS DVSS
N
MCLK DVSS JTDO NC TST_TA TST_RA NC NC DVDDIO DVSS DVSS
P
CLK_CMN RST_SYS_N JTRST_N TST_TB NC NC NC NC NC DVDDIO DVDDIO
R
ATVSS5 ATVDD5 RXTSEL NC NC TST_RC NC DVSS NC NC NC
T
NC NC HiZ_N NC DVDDC NC NC NC NC NC NC
U
ARVSS5 ARVDD5 NC NC NC DVSS NC NC NC NC NC
V
NC NC DVDDLIU NC DVDDC NC NC NC NC NC NC
W
ATVDD6 ATVSS6 NC DVSS NC NC NC NC NC NC NC
Y
NCNCDVSSLIUNCNCNCNCNCNCDVDDCNC
AA
ARVSS6 ARVDD6 NC NC NC NC NC NC ATVDD7 NC ARVDD7
AB
NC NC NC NC NC NC NC NC ATVSS7 NC ARVSS7
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DVDDC RTIP1 ARVSS1 TTIP1 ATVSS1 SD_A[0] SD_D[6] SD_A[5] SD_DQM[0] SD_D[3] SD_D[5]
A
DVSS RRING1 ARVDD1 TRING1 ATVDD1 SD_CS_N SD_A[3] SD_A[10] SD_DQM[2] SD_D[7] SD_D[10]
B
TDM1_TX TDM2_RX_SYNC TDM2_RSIG_RTS TDM3_RCLK SD_D[4] SD_WE_N SD_D[0] SD_BA[1] DVDDC SD_D[12] SD_D[14]
C
TDM1_RCLK TDM2_RX TDM3_RX_SYNC TDM3_RX SD_RAS_N SD_A[11] SD_A[9] DVSS SD_DQM[3] SD_D[15] SD_D[17]
D
TDM2_RCLK TDM1_TX_SYNC TDM2_TX_SYNC TDM3_TX SD_CAS_N SD_A[4] DVDDC SD_DQM[1] DVDDC SD_D[8] SD_D[21]
E
TDM1_TCLK TDM1_TX_MF_CD TDM3_TX_SYNC TDM4_RSIG_RTS SD_A[2] DVSS SD_A[1] SD_A[7] SD_A[8] SD_D[1] SD_D[24]
F
TDM3_TSIG_CTS TDM3_RSIG_RTS TDM3_ACLK TDM4_TSIG_CTS SD_D[29] SD_BA[0] DVDDC SD_D[2] SD_D[16] SD_D[19] SD_D[26]
G
TDM4_ACLK TDM4_TX_MF_CD TDM4_RX_SYNC DVSS SD_CLK SD_A[6] SD_D[13] SD_D[9] SD_D[11] SD_D[23] SD_D[28]
H
DVDDIO DVDDIO TDM4_RCLK SCEN
H_WR_BE1_N/SPI_MO
SI
H_INT[0]
H_WR_BE2_N/SPI_SE
L_N
SD_D[22] SD_D[18] SD_D[20] SD_D[31]
J
DVSS DVSS DVDDIO STMD H_AD[3] H_R_W_N/SPI_CP H_READY_N H_CPU_SPI_N SD_D[27] SD_D[25] SD_D[30]
K
DVSS DVSS DVDDIO H_AD[11] H_AD[9] H_CS_N H_AD[1]
H_WR_BE0_N/SPI_CL
K
H_WR_BE3_N/SPI_CI DAT_32_16_N H_INT[1]
L
DVSS DVSS DVDDIO MBIST_DONE H_AD[7] H_AD[20] H_AD[6] H_AD[18] H_AD[8] H_AD[2] H_AD[4]
M
DVSS DVSS DVDDIO MBIST_FAIL H_AD[13] H_AD[23] H_D[2] H_AD[16] H_AD[14] H_AD[19] H_AD[10]
N
DVDDIO DVDDIO NC MBIST_EN H_D[5] H_D[22] H_D[11] H_D[14] H_AD[21] H_AD[12] H_AD[15]
P
NC NC NC DVSS H_D[7] H_D[24] H_D[29] H_D[20] H_D[3] H_AD[17] H_AD[22]
R
NC NC NC NC H_D[9] H_D[4] DVDDC H_D[26] H_AD[5] H_AD[24] H_D[0]/SPI_MISO
T
NC NC NC NC H_D[28] DVSS H_D[6] H_D[31] H_D[19] H_D[1] H_D[8]
U
NC NC NC NC CLK_MII_RX MII_RX_ERR DVDDC H_D[25] DVDDC H_D[23] H_D[10]
V
NC NC NC NC MII_RXD[1] MII_TX_EN MII_TXD[1] DVSS H_D[30] H_D[27] H_D[12]
W
DVSS NC NC NC MII_RXD[3] MII_RX_DV MII_CRS CLK_SSMII_TX DVDDC H_D[13] H_D[15]
Y
NC ARVDD8 NC ATVDD8 MII_RXD[0] MII_COL CLK_MII_TX MII_TXD[2] MDIO H_D[16] H_D[17]
AA
NC ARVSS8 NC ATVSS8 MII_RXD[2] MDC MII_TXD[0] MII_TXD[3] MII_TX_ERR H_D[18] H_D[21]
AB
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