Datasheet
____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
327 of 366
14.2
LIU and Framer TDM Interface Timing
Table 14-3. Receiver AC Characteristics
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
RCLK/RCLKF Period t
CP
t
CP
648
488
ns
ns
1
2
RCLK/RCLKF Pulse Width t
CH
t
CL
t
CH
t
CL
259
259
195
195
389
389
289
289
ns
ns
ns
ns
1
1
2
2
RSYSCLK Period t
SP
t
SP
648
488
ns
ns
3
4
RSYSCLK Pulse Width t
SH
t
SL
t
SH
t
SL
259
259
195
195
389
389
289
289
ns
ns
ns
ns
1
1
2
2
RSYNC Set Up to RSYSCLK Falling t
SU1
20 ns
RSYNC Hold from RSYSCLK Falling t
HD1
20 ns
RDATF or RSYNC Set Up to RCLK or
RCLKF or RSYSCLK Falling
t
SU
20 ns
RDATF or RSYNC Hold From RCLK or
RCLKF or RSYSCLK Falling
t
HD
20 ns
Delay RCLKF to RSER t
D1
50 ns
Delay RCLKF to RSYNC,
RFSYNC/RMSYNC
t
D2
50 ns 5
Delay RSYSCLK to RSER t
D3
50 ns
Delay RSYSCLK to RMSYNC, RSYNC t
D4
50 ns 5
Delay RCLK to RSER t
D5
50 ns
Delay RCLK to RSYNC,
RFSYNC/RMSYNC
t
D6
50 ns 5
NOTES:
1. T1 Mode
2. E1 Mode
3. RSYSCLK = 1.544 MHz.
4. RSYSCLK = 2.048 MHz.
5. RSYNC in output mode.
The output timing specification for each receive framer signal is with a 30pF load.
Figure 14-1. Receive Framer Timing Using the RCLKF Pin
RCLKF
RSER
RFSYNC_RMSYNC
RSYNC
F Bit
t
D1
t
D2
t
D2










