Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
285 of 366
Register Name:
TSa7
Register Description:
Transmit Sa7 Bits (E1 Mode Only)
Register Address:
base address + 0x5B0
Bit # 7 6 5 4 3 2 1 0
Name Tsa7F15 Tsa7F13 Tsa7F11 Tsa7F9 Tsa7F7 Tsa7F5 Tsa7F3 Tsa7F1
Default 0 0 0 0 0 0 0 0
When Sa7=1 in TSACR, t
he bits of this register specify the Sa7 bits to be transmitted in outgoing multiframes. The
Sa7 bits are sampled from this register at the start of the multiframe. The multiframe boundary is indicated by the
TMF status bit in TLS1. S
See Section 10.11.5.2.
Bit 7: Sa7 Bit of Frame 15 (Tsa4F15).
Bit 6: Sa7 Bit of Frame 13 (Tsa7F13).
Bit 5: Sa7 Bit of Frame 11 (Tsa7F11).
Bit 4: Sa7 Bit of Frame 9 (Tsa7F9).
Bit 3: Sa7 Bit of Frame 7 (Tsa7F7).
Bit 2: Sa7 Bit of Frame 5 (Tsa7F5).
Bit 1: Sa7 Bit of Frame 3 (Tsa7F3).
Bit 0: Sa7 Bit of Frame 1 (Tsa7F1).
Register Name:
TSa8
Register Description:
Transmit Sa8 Bits (E1 Mode Only)
Register Address:
base address + 0x5B4
Bit # 7 6 5 4 3 2 1 0
Name Tsa8F15 Tsa8F13 Tsa8F11 Tsa8F9 Tsa8F7 Tsa8F5 Tsa8F3 Tsa8F1
Default 0 0 0 0 0 0 0 0
When Sa8=1 in TSACR, t
he bits of this register specify the Sa8 bits to be transmitted in outgoing multiframes. The
Sa8 bits are sampled from this register at the start of the multiframe. The multiframe boundary is indicated by the
TMF status bit in TLS1. See Section 10.11.5.2.
Bit 7: Sa
8 Bit of Frame 15 (Tsa8F15).
Bit 6: Sa8 Bit of Frame 13 (Tsa8F13).
Bit 5: Sa8 Bit of Frame 11 (Tsa8F11).
Bit 4: Sa8 Bit of Frame 9 (Tsa8F9).
Bit 3: Sa8 Bit of Frame 7 (Tsa8F7).
Bit 2: Sa8 Bit of Frame 5 (Tsa8F5).
Bit 1: Sa8 Bit of Frame 3 (Tsa8F3).
Bit 0: Sa8 Bit of Frame 1 (Tsa8F1).