Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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Register Name:
TSa5
Register Description:
Transmitted Sa5 Bits (E1 Mode Only)
Register Address:
base address + 0x5A8
Bit # 7 6 5 4 3 2 1 0
Name Tsa5F15 Tsa5F13 Tsa5F11 Tsa5F9 Tsa5F7 Tsa5F5 Tsa5F3 Tsa5F1
Default 0 0 0 0 0 0 0 0
When Sa5=1 in TSACR, t
he bits of this register specify the Sa5 bits to be transmitted in outgoing multiframes. The
Sa5 bits are sampled from this register at the start of the multiframe. The multiframe boundary is indicated by the
TMF status bit in TLS1. See Section 10.11.5.2.
Bit 7: Sa
5 Bit of Frame 15 (Tsa5F15).
Bit 6: Sa5 Bit of Frame 13 (Tsa5F13).
Bit 5: Sa5 Bit of Frame 11 (Tsa5F11).
Bit 4: Sa5 Bit of Frame 9 (Tsa5F9).
Bit 3: Sa5 Bit of Frame 7 (Tsa5F7).
Bit 2: Sa5 Bit of Frame 5 (Tsa5F5).
Bit 1: Sa5 Bit of Frame 3 (Tsa5F3).
Bit 0: Sa5 Bit of Frame 1 (Tsa5F1).
Register Name:
TSa6
Register Description:
Transmit Sa6 Bits (E1 Mode Only)
Register Address:
base address + 0x5AC
Bit # 7 6 5 4 3 2 1 0
Name Tsa6F15 Tsa6F13 Tsa6F11 Tsa6F9 Tsa6F7 Tsa6F5 Tsa6F3 Tsa6F1
Default 0 0 0 0 0 0 0 0
When Sa6=1 in TSACR, t
he bits of this register specify the Sa6 bits to be transmitted in outgoing multiframes. The
Sa6 bits are sampled from this register at the start of the multiframe. The multiframe boundary is indicated by the
TMF status bit in TLS1. See Section 10.11.5.2.
Bit 7: Sa
6 Bit of Frame 15 (Tsa6F15).
Bit 6: Sa6 Bit of Frame 13 (Tsa6F13).
Bit 5: Sa6 Bit of Frame 11 (Tsa6F11).
Bit 4: Sa6 Bit of Frame 9 (Tsa6F9).
Bit 3: Sa6 Bit of Frame 7 (Tsa6F7).
Bit 2: Sa6 Bit of Frame 5 (Tsa6F5).
Bit 1: Sa6 Bit of Frame 3 (Tsa6F3).
Bit 0: Sa6 Bit of Frame 1 (Tsa6F1).