Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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Register Name:
TSiAF
Register Description:
Transmit Si Bits of the Align Frames (E1 Mode)
Register Address:
base address + 0x598
Bit # 7 6 5 4 3 2 1 0
Name TsiF14 TsiF12 TsiF10 TsiF8 TsiF6 TsiF4 TsiF2 TsiF0
Default 0 0 0 0 0 0 0 0
The align frame is the E1 frame containing the frame alignment signal (FAS). When SiAF=1 in TSACR, the bits of
this regi
ster specify the Si bits to be transmitted in the align frames of outgoing multiframes. The Si bits are
sampled from this register at the start of the multiframe. The multiframe boundary is indicated by the TMF status bit
in TLS1. See Section 10.11.5.2.
Bit 7: Si Bit
of Frame 14 (TsiF14).
Bit 6: Si Bit of Frame 12 (TsiF12).
Bit 5: Si Bit of Frame 10 (TsiF10).
Bit 4: Si Bit of Frame 8 (TsiF8).
Bit 3: Si Bit of Frame 6 (TsiF6).
Bit 2: Si Bit of Frame 4 (TsiF4).
Bit 1: Si Bit of Frame 2 (TsiF2).
Bit 0: Si Bit of Frame 0 (TsiF0).
Register Name:
TSiNAF
Register Description:
Transmit Si Bits of the Non-Align Frames (E1 Mode Only)
Register Address:
base address + 0x59C
Bit # 7 6 5 4 3 2 1 0
Name TsiF15 TsiF13 TsiF11 TsiF9 TsiF7 TsiF5 TsiF3 TsiF1
Default 0 0 0 0 0 0 0 0
The non-align frame is the E1 frame that does not contain the frame alignment signal (FAS). When SiNAF=1 in
TSACR, the
bits of this register specify the Si bits to be transmitted in the non-align frames of outgoing multiframes.
The Si bits are sampled from this register at the start of the multiframe. The multiframe boundary is indicated by the
TMF status bit in TLS1. See Section 10.11.5.2.
Bit 7: Si Bit
of Frame 15 (TsiF15).
Bit 6: Si Bit of Frame 13 (TsiF13).
Bit 5: Si Bit of Frame 11 (TsiF11).
Bit 4: Si Bit of Frame 9 (TsiF9).
Bit 3: Si Bit of Frame 7 (TsiF7).
Bit 2: Si Bit of Frame 5 (TsiF5).
Bit 1: Si Bit of Frame 3 (TsiF3).
Bit 0: Si Bit of Frame 1 (TsiF1).