Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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11.5.2
Transmit Formatter Registers
Table 11-21 lists the transmit formatter registers. Some of these registers change function depending on whether
E1 mode or T1/J1 mode is specified in the TMMR
register. These dual-function registers are shown below using
two lines of text, one for E1 and one for T1/J1. All addresses not listed in the table are reserved and should be
initialized with a value of 0x00 for proper operation. The base address for the port n formatter is
0x100,400+0x800*(n-1) (where n=1-8 for DS34T108, n=1-4 for DS34T104, n=1-2 for DS34T102, n=1 for
DS34T101). The formatter block was originally designed for an 8-bit data bus. In this device, each 8-bit register is
mapped to the least significant byte of the dword.
Table 11-21. Transmit Formatter Registers
Addr
Offset
Register Name Description
Read/Write or
Read Only
Page
400 TDMWE1 Tx Digital MilliWatt Enable Register 1 R/W 274
404 TDMWE2 Tx Digital MilliWatt Enable Register 2 R/W 274
408 TDMWE3 Tx Digital MilliWatt Enable Register 3 R/W 274
40C TDMWE4 Tx Digital MilliWatt Enable Register 4 R/W 274
410 TJBE1 Tx Jammed Bit Eight Stuffing Register 1 R/W 275
414 TJBE2 Tx Jammed Bit Eight Stuffing Register 2 R/W 275
418 TJBE3 Tx Jammed Bit Eight Stuffing Register 3 R/W 275
41C TJBE4 Tx Jammed Bit Eight Stuffing Register 4 R/W 275
420 TDDS1 Tx DDS Zero Code Register 1 (T1 Mode Only) R/W 275
424 TDDS2 Tx DDS Zero Code Register 2 (T1 Mode Only) R/W 275
428 TDDS3 Tx DDS Zero Code Register 3 (T1 Mode Only) R/W 275
440 THC1 Tx HDLC Control Register 1 R/W 275
444 THBSE Tx HDLC Bit Suppress Register R/W 276
44C THC2 Tx HDLC Control Register 2 R/W 277
450 TSACR Tx Sa Bit Control Register (E1 Mode Only) R/W 277
460 TSSIE1 Tx Software Signaling Insertion Enable 1 R/W 278
464 TSSIE2 Tx Software Signaling Insertion Enable 2 R/W 278
468 TSSIE3 Tx Software Signaling Insertion Enable 3 R/W 278
46C TSSIE4 Tx Software Signaling Insertion Enable 4 (E1 Only) R/W 278
480 4TIDR1 Tx Idle Definition Register 1 R/W 278
f484 4TIDR1 Tx Idle Definition Register 2 R/W 278
488 4TIDR1 Tx Idle Definition Register 3 R/W 278
48C 4TIDR1 Tx Idle Definition Register 4 R/W 278
490 4TIDR1 Tx Idle Definition Register 5 R/W 278
494 4TIDR1 Tx Idle Definition Register 6 R/W 278
498 4TIDR1 Tx Idle Definition Register 7 R/W 278
49C 4TIDR1 Tx Idle Definition Register 8 R/W 278
4A0 4TIDR1 Tx Idle Definition Register 9 R/W 278
4A4 4TIDR1 Tx Idle Definition Register 10 R/W 278
4A8 4TIDR1 Tx Idle Definition Register 11 R/W 278
4AC 4TIDR1 Tx Idle Definition Register 12 R/W 278
4B0 4TIDR1 Tx Idle Definition Register 13 R/W 278
4B4 4TIDR1 Tx Idle Definition Register 14 R/W 278
4B8 4TIDR1 Tx Idle Definition Register 15 R/W 278
4BC 4TIDR1 Tx Idle Definition Register 16 R/W 278
4C0 4TIDR1 Tx Idle Definition Register 17 R/W 278
4C4 4TIDR1 Tx Idle Definition Register 18 R/W 278
4C8 4TIDR1 Tx Idle Definition Register 19 R/W 278
4CC 4TIDR1 Tx Idle Definition Register 20 R/W 278
4D0 4TIDR1 Tx Idle Definition Register 21 R/W 278
4D4 4TIDR1 Tx Idle Definition Register 22 R/W 278
4D8 4TIDR1 Tx Idle Definition Register 23 R/W 278
4DC 4TIDR1 Tx Idle Definition Register 24 R/W 278
4E0 4TIDR1 Tx Idle Definition Register 25 (E1 Mode Only) R/W 278
4E4 4TIDR1 Tx Idle Definition Register 26 (E1 Mode Only) R/W 278