Datasheet
____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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Bit 3: Receive Up Code Definition Bit 3 (C3). Ignored if a 1 to 4 bit length is selected.
Bit 2: Receive Up Code Definition Bit 2 (C2). Ignored if a 1 to 5 bit length is selected.
Bit 1: Receive Up Code Definition Bit 1 (C1). Ignored if a 1 to 6 bit length is selected.
Bit 0: Receive Up Code Definition Bit 0 (C0). Ignored if a 1 to 7 bit length is selected.
Register Name:
RUPCD2
Register Description:
Receive Up Code Definition Register 2
Register Address:
base address + 0x2B4
Bit # 7 6 5 4 3 2 1 0
Name C15 C14 C13 C12 C11 C10 C0 C8
Default 0 0 0 0 0 0 0 0
See Section 10.11.14.
Bit 7:
Receive Up Code Definition Bit 15 (C15). Ignored if a 1 to 7 bit length is selected.
Bit 6: Receive Up Code Definition Bit 14 (C14). Ignored if a 1 to 7 bit length is selected.
Bit 5: Receive Up Code Definition Bit 13 (C13). Ignored if a 1 to 7 bit length is selected.
Bit 4: Receive Up Code Definition Bit 12 (C12). Ignored if a 1 to 7 bit length is selected.
Bit 3: Receive Up Code Definition Bit 11 (C11). Ignored if a 1 to 7 bit length is selected.
Bit 2: Receive Up Code Definition Bit 10 (C10). Ignored if a 1 to 7 bit length is selected.
Bit 1: Receive Up Code Definition Bit 9 (C9). Ignored if a 1 to 7 bit length is selected.
Bit 0: Receive Up Code Definition Bit 8 (C8). Ignored if a 1 to 7 bit length is selected.
Register Name:
RDNCD1
Register Description:
Receive Down Code Definition Register 1
Register Address:
base address + 0x2B8
Bit # 7 6 5 4 3 2 1 0
Name C7 C6 C5 C4 C3 C2 C1 C0
Default 0 0 0 0 0 0 0 0
Note: Writing this register resets the detector’s integration period. See Section 10.11.14.
Bit 7:
Receive Down Code Definition Bit 7 (C7). First bit of the repeating pattern.
Bit 6: Receive Down Code Definition Bit 6 (C6). Ignored if a 1-bit length is selected.
Bit 5: Receive Down Code Definition Bit 5 (C5). Ignored if a 1 or 2 bit length is selected.
Bit 4: Receive Down Code Definition Bit 4 (C4). Ignored if a 1 to 3 bit length is selected.
Bit 3: Receive Down Code Definition Bit 3 (C3). Ignored if a 1 to 4 bit length is selected.
Bit 2: Receive Down Code Definition Bit 2 (C2). Ignored if a 1 to 5 bit length is selected.
Bit 1: Receive Down Code Definition Bit 1 (C1). Ignored if a 1 to 6 bit length is selected.
Bit 0: Receive Down Code Definition Bit 0 (C0). Ignored if a 1 to 7 bit length is selected.