Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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11.5 Framer, LIU and BERT Registers
Table 11-19. Framer, LIU, BERT Memory Map
Port Rx Framer (p. 224)
Tx Formatter (p. 272) LIU (p. 303) BERT (p. 312)
1 100,000 – 100,3BC 100,400 – 100,7BC 104,000 – 104,07C 104,400 – 104,47C
2 100,800 – 100,BBC 100,C00 – 100,FBC 104,080 – 104,0FC 104,480 – 104,4FC
3 101,000 – 101,3BC 101,400 – 101,7BC 104,100 – 104,17C 104,500 – 104,57C
4 101,800 – 101,BBC 101,C00 – 101,FBC 104,180 – 104,1FC 104,580 – 104,5FC
5 102,000 – 102,3BC 102,400 – 102,7BC 104,200 – 104,27C 104,600 – 104,67C
6 102,800 – 102,BBC 102,C00 – 102,FBC 104,280 – 104,2FC 104,680 – 104,6FC
7 103,000 – 103,3BC 103,400 – 103,7BC 104,300 – 104,37C 104,700 – 104,77C
8 103,800 – 103,BBC 103,C00 – 103,FBC 104,380 – 104,3FC 104,780 – 104,7FC
11.5.1 Receive Framer Registers
Table 11-20 lists the Rx framer registers. Some of these registers change function depending on whether E1 mode
or T1/J1 mode is specified in the RMMR regi
ster. These dual-function registers are shown below using two lines of
text, one for E1 and one for T1/J1. All addresses not listed in the table are reserved and should be initialized with a
value of 0x00 for proper operation. The base address for the port n framer is 0x100,000+0x800*(n-1) (where n=1-8
for DS34T108, n=1-4 for DS34T104, n=1-2 for DS34T102, n=1 for DS34T101). The framer block was originally
designed for an 8-bit data bus. In this device, each 8-bit register is mapped to the least significant byte of the
dword.
Table 11-20. Receive Framer Registers
Addr
Offset
Register Name Description
Read/Write or
Read Only
Page
0x000 RDMWE1-E1 Rx Digital Milliwatt Enable Register 1 (E1 Only) R/W 227
004 RDMWE2-E1 Rx Digital Milliwatt Enable Register 2 (E1 Only) R/W 227
008 RDMWE3-E1 Rx Digital Milliwatt Enable Register 3 (E1 Only) R/W 227
00C RDMWE4-E1 Rx Digital Milliwatt Enable Register 4 (E1 Only) R/W 227
040 RHC Rx HDLC Control Register R/W 227
044 RHBSE Rx HDLC Bit Suppress Register R/W 228
048 RDS0SEL Rx DS0 Monitor Select Register R/W 228
04C RSIGC Rx Signaling Control Register R/W 229
050
RCR2-T1
RSAIMR
Rx Control Register 2 (T1 Mode)
Rx Sa Bit Interrupt Mask Register (E1 Mode)
R/W
229
4230
054 RBOCC Rx BOC Control Register (T1 Mode Only) R/W 231
080 RIDR1 Rx Idle Definition 1 R/W 231
084 RIDR2 Rx Idle Definition 2 R/W 231
088 RIDR3 Rx Idle Definition 3 R/W 231
08C RIDR4 Rx Idle Definition 4 R/W 231
090 RIDR5 Rx Idle Definition 5 R/W 231
094 RIDR6 Rx Idle Definition 6 R/W 231
098 RIDR7 Rx Idle Definition 7 R/W 231
09C RIDR8 Rx Idle Definition 8 R/W 231
0A0 RIDR9 Rx Idle Definition 9 R/W 231
0A4 RIDR10 Rx Idle Definition 10 R/W 231
0A8 RIDR11 Rx Idle Definition 11 R/W 231
0AC RIDR12 Rx Idle Definition 12 R/W 231
0B0 RIDR13 Rx Idle Definition 13 R/W 231
0B4 RIDR14 Rx Idle Definition 14 R/W 231
0B8 RIDR15 Rx Idle Definition 15 R/W 231