Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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Rx_return_q_level 0x70 (0x72)
Bits Data Element Name R/W
Reset
Value
Description
[31:6] Reserved - 0x0 Must be set to zero
[5:0] Level RO 0x0 Number of buffers currently stored in the queue. Range: 0
to 32.
Rx_return_q_thresh 0x74 (0x76)
Bits Data Element Name R/W
Reset
Value
Description
[31:6] Reserved - 0x0 Must be set to zero
[5:0] Threshold RO 0x0
If the number of buffers in the queue is  this threshold,
an interrupt is generated. Range: 0 to 32.
11.4.7 Transmit Buffers Pool
The base address for the TDMoP transmit buffers pool is 0x28,000. See section 10.6.11.7 for details.
11.4.7.1 Per-Bundle Head Pointers
In the register descriptions in this section, the index n indicates the bundle number: 0 to 63.
The RAM should be initialized by CPU software to hold the heads of the linked lists for all open bundles. See
section 10.6.11.7.
Per-Bundle
Head[n] 0x800+n*4
Bits Data Element Name R/W
Reset
Value
Description
[31:10] Reserved None Must be set to zero
[9] Buffer_valid R/W None 0 = The head contains non-valid information (i.e. the pool
is empty).
1 = The head points to a valid free buffer.
[8:0] Buffer_id R/W None The full address of the buffer consists of the Tx buffer
base address (specified in General_cfg_reg1.
Tx_buf_base_add) co
ncatenated with the buffer ID and
eleven 0s.
11.4.7.2 Per-Buffer Next-Buffer Pointers
A pointer to the next buffer in the linked list.
In the register descriptions in this section, the index n indicates the buffer number: 0 to 511.
The RAM should be initialized by CPU software to hold the linked lists for all the bundles. See section 10.6.11.7.
Per Buffer
Next Buffer[n] 0x000+n*4
Bits Data Element Name R/W
Reset
Value
Description
[31:9] Reserved - None Must be set to zero
[8:0] Buffer_offset R/W None The offset (ID) of the next buffer in the linked list in the
SDRAM area dedicated to the Tx payload-type machines.
The full address of the buffer consists of the Tx buffer
base address (specified in General_cfg_reg1.
Tx_buf_base_add) concatenated with the buffer offset
and eleven 0s.