Datasheet
____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
163 of 366
General_cfg_reg2 0x08
Bits Data Element Name R/W
Reset
Value
Description
[31:29] Rx_HDLC_min_flags R/W 0x0
Minimum number flags between 2 adjacent HDLC frames
transmitted towards the cross-connect block. The number
of flags is equal to Rx_hdlc_min_flags + 1. Range: 1 – 8.
[28:24] Reserved R/W 0x0 Must be set to zero
[23:20]
Rx_SAToP/CESoPSN_discard_
mask
R/W 0x0
Each bit of this field determines whether a specific type of
discarded packet is to be counted by the
Discarded_SAToP/CESoPSN_Rxd_packets counter.
0 =
don’t count
1 = count
bit 23: count packets that were discarded because of jump
operation that caused overflow in jitter buffer.
bit 22: count packets that were discarded due to incorrect
sequence number.
bit 21: count packets that were discarded due to over-run
state in jitter buffer.
bit 20: count packets that were discarded because they
were considered duplicated, or because they were
received too late to be inserted into the jitter buffer.
[19:0] Reserved R/W 0x0 Must be set to zero
In the Port[n]_cfg_reg d
escription below, the index n indicates port number: 1-8 for DS34T108, 1-4 for DS34T104,
1-2 for DS34T102, 1 only for DS34T101.
Port[n]_cfg_reg 0x08+n*4
Bits Data Element Name R/W
Reset
Value
Description
[31:30] Reserved R/W 0x0 Must be set to zero.
[29:24] Unframed_int_rate R/W 0x0
The bit rate of an unframed interface type (Used only for
absolute mode RTP timestamping).
1 = 64 kbps
2 = 128 kbps
.
.
.
32 = 2.048 Mbps
33 =1.544 Mbps
34 = 34 Mbps (E3 rate)
45 = 45 Mbps (T3 rate)
52 = 51.84 Mbps (STS-1 rate)
Note: E3, T3 and STS-1 configurations are available for
Port 1 only in high-speed mode, i.e. when
3General_cfg_reg0.High_speed=1.
[23] PCM_rate R/W 0x0
Indicates the PCM frequency, i.e. the TDM rate in and out
of the TDMoP port. Only applies when int_frame_type
(bits 3:2 below) is set for framed or framed-with-CAS and
int_type (bits 1:0 below) is set for E1 or T1.
0 = 1.544 MHz
1 = 2.048 MHz
This bit is for enabling T1 data over an E1-rate port. The
combination of Int_type=E1 and PCM_rate=1.544 MHz is
not allowed.