Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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specify the 8-bit idle code for each channel and the TCICE regi
sters enable idle code insertion on a per-channel
basis.
10.11.13 Digital Milliwatt Code Generation
The Rx digital milliwatt registers (RDMWE) specify which of the Rx E1/T1 channels should be overwritten with a
digital milliwatt code. The digital milliwatt code is an 8-byte repeating pattern that represents a 1kHz sine wave
(1E/0B/0B/1E/9E/8B/8B/9E). Each bit in the RDMWE regi
sters represents one channel. If a bit is set to a one, then
the Rx data in that channel is replaced with the digital milliwatt code. The TDMWE regi
sters perform the same
function in the transmit formatter.
10.11.14 In-Band Loop Code Generation and Detection (T1 Only)
10.11.14.1 Loop Code Generation
The transmit formatter can generate a repeating bit pattern from one to eight bits or 16 bits in length. This function
is available only in T1 mode.
To transmit a pattern, load the pattern to be sent into the transmit code definition registers (TCD1 an
d TCD2) and
specify the length of the pattern in TCR4.TC. When
generating a 1-, 2-, 4-, 8-, or 16-bit pattern, both transmit code
definition registers must be filled with the proper code. Generation of a 3-, 5-, 6-, or 7-bit pattern only requires
TCD1 to be f
illed. After these register fields are loaded, the pattern is transmitted as long as TCR3.TLOOP=1.
Normally (unless the formatter is programmed to not insert the F-bit position) the formatter overwrites the repeating
pattern once every 193 bits to insert the F-bit.
As an example, to transmit the standard “loop up” code for channel service units (CSUs), which is a repeating
pattern of ...10000100001..., set TCD1 =
0x80, TCR4.TC=00, and TCR3.TLOOP=1.
Table 10-56. Registers Related to T1 In-Band Loop Code Generator
Register Field Description Functions Page
TCD1 Transmit Code Definition Register 1 pattern to be sent 300
TCD2 Transmit Code Definition Register 2 pattern to be sent 300
TCR3.TLOOP Transmit Control Register 3 enable loop code transmission 290
TCR4.TC Transmit Control Register 4 code length 293
10.11.14.2 Loop Code Detection
The Rx framer can detect a repeating bit pattern from one to eight bits or 16 bits in length. This function is available
only in T1 mode.
The framer has three programmable pattern detectors. Typically, two of the detectors are used for “loop up” and
“loop down” code detection. The CPU writes the codes to be detected into the Rx up code definition registers
(RUPCD1 and
RUPCD2) and the Rx down code definition registers (RDNCD1 and RDNCD2) and the length of
each pattern into the RIBCC regi
ster. The third detector is considered “spare” (i.e. extra). and is configured and
controlled by the RSCD1/RSCD2 an
d RSCC registers. When detecting a 16-bit pattern, both Rx code definition
registers are used together to form a 16-bit word. For 8-bit patterns both Rx code definition registers are loaded
with the same value. Detection of a 1-, 2-, 3-, 4-, 5-, 6-, and 7-bit pattern only requires the first Rx code definition
register to be filled. The framer detects repeating pattern codes in both framed and unframed data streams with bit
error rates as high as 10E–2. The detectors are capable of handling both F-bit inserted and F-bit overwrite
patterns. Writing the least significant byte of a Rx code definition register pair resets the integration period for that
detector. The code detector has a nominal integration period of 48ms. This means that after about 48ms of
receiving a valid code, the associated status bit (LUP, LDN, and LSP) is set to a one. Note that both real-time
status bits and latched status bit are available for LUP, LDN and LSP (RRTS3-T1 and RLS3-T1). N
ormally codes
are sent for a period of 5 seconds. It is recommend that the CPU poll the framer every 50ms to 100ms until 5
seconds has elapsed to ensure that the code is continuously present.