Datasheet

____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
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10.10
Elastic Stores and Framer System Interface
The framer and formatter provide versatile system interfaces with the following capabilities:
Elastic stores can be enabled in the Tx path, the Rx path or both to support controlled slips
T1 channels can be mapped/demapped to/from a 2.048MHz TDM data stream
E1 channels can be mapped/demapped to/from a 1.544MHz TDM data stream
Optional support for signaling in/out of the device on device pins
Various options for frame/multiframe sync to be supplied by the framer/formatter or externally supplied
System interface TDM signals can be connected internally to the TDMoP core
System interface TDM signals can be connected to external components through device pins
Each E1/T1 transceiver has a two-frame elastic store for the receive framer and a two-frame elastic store for the
transmit formatter. The two elastics stores are fully independent and can be enabled/disabled independently.
An elastic store has two main purposes. First, it can be used to absorb small differences in frequency and phase
between the clock driving the framer or formatter and an asynchronous (i.e., not frequency locked) system TDM
clock. In this mode, the elastic store manages the frequency difference by performing controlled slips, i.e. deleting
or repeating entire E1 or T1 frames as needed match the incoming data rate with the outgoing data rate.
Second, an elastic store can be used for E1/T1 rate conversion. When the framer or formatter is in T1 mode, the
elastic store can rate-convert the T1 data stream to a 2.048MHz TDM data stream by mapping or demapping the
DS0s in the T1 to/from some of the DS0s of the 2.048MHz TDM stream. In E1 mode the elastic store can rate-
convert the E1 data stream to a 1.544MHz TDM stream by mapping or demapping some of the DS0s in the E1
to/from the DS0s of the 1.544MHz TDM stream.
If the elastic store is enabled while in E1 mode, then either CAS or CRC-4 multiframe boundaries are be indicated
via the framer’s RMSYNC output as controlled by (RIOCR.
RSMS2). If the framer’s RSYSCLK is 1.544MHz, then
the RBCS
registers specify which channels of the received E1 data stream are be deleted. In this mode, an F-bit
location is inserted into the RSER data and set to one. If the two-frame elastic store either fills or empties, a
controlled slip occurs. If the buffer empties, then a full frame of data is repeated at RSER and the RLS4.RSLIP and
RLS4.RESE
M bits are set to a one. If the buffer fills, then a full frame of data is deleted and the RLS4.RSLIP and
RLS4.RESF
bits are set to a one.
Table 10-32. Registers Related to the Elastic Store
Register Name Description Functions Page
RIOCR Receive I/O Configuration Register RSYNC config, RSYSCLK frequency 227
RESCR Receive Elastic Store Control Register Rx enable, align, reset, min delay, etc. 250
RLS4 Receive Latched Status Register 4 Rx full, empty, slip latched status bits 256
RIM4 Receive Interrupt Mask Register 4 Rx interrupt mask bits 263
TIOCR Transmit I/O Configuration Register TSSYNC config, TSYSCLK frequency 291
TESCR Transmit Elastic Store Control Register Tx enable, align, reset, min delay, etc. 292
TLS1 Transmit Latched Status Register 1 Tx full, empty, slip latched status bits 296
TIM1 Transmit Interrupt Mask Register 1 Tx interrupt mask bits 298
GCR1.TSSYNCPE Transmit System Sync Pin Enable configures pin as TSSYNC vs. SYNC 151
10.10.1
Elastic Store Initialization
Two elastic store initializations may be used to improve performance: elastic store reset and elastic store align.
Both of these involve the manipulation of the elastic store’s read and write pointers. This is useful primarily in
synchronous applications (where RSYSCLK/TSYSCLK are locked to RCLK/TCLK respectively). Elastic store reset
is used to minimize the delay through the elastic store. Elastic store align is used to 'center' the read/write pointers
to the extent possible. These initializations are accomplished as shown in Table 10-33.