Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 93 of 198
11.4 TDM-over-Packet Registers
The base address for the TDMoP registers is 0x0.
Table 11-3. TDMoP Memory Map
Address Offset
Contents
Page
0x0,000
Configuration and Status Registers
94
8,000
Bundle Configuration Tables
108
10,000
Counters
117
12,000
Status Tables
120
18,000
Timeslot Assignment Tables
120
20,000
CPU Queues
122
28,000
Transmit Buffers Pool
124
30,000
Jitter Buffer Control
130
38,000
Transmit Software CAS
134
40,000
Receive Line CAS
136
48,000
Clock Recovery
137
50,000
Receive SW Conditioning Octet Select
138
58,000
Receive SW CAS
139
68,000
Interrupt Controller
140
70,000
Packet Classifier
147
72,000
Ethernet MAC
148