Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 73 of 198
10.6.11.9 Ethernet to TDM Flow
A packet arriving from the Ethernet port passes through the Ethernet MAC block. The MAC block does not store
the packet, but it does calculate the CRC to verify packet data integrity. If the packet is bad, the MAC signals this to
the packet classifier on the last word of the packet, and the packet classifier discards it.
The packet classifier examines the packet header and decides to either discard the packet or transfer it into the
chip based on the settings of the packet classifier configuration registers (see Table 11-4). The packet classifier
tags the buffer descriptor for one of the following destinations: ETH-to-CPU queue or payload-type machines. The
packet classifier stores the packet payload preceded by the buffer descriptor in the Rx FIFO and notifies the Rx
arbiter. The Rx arbiter then passes it to one of the payload-type machines. The payload-type machine extracts the
TDM data and inserts it into the jitter buffer in the SDRAM. From there, the data is transmitted serially out the TDM
port.
Figure 10-52. Ethernet-to-TDM Flow
RX
RAW
RX
HDLC
RX
FIFO
RX
AAL1
SDRAM
PACKET
CLASSIFIER
RX
ARBITER
ETH
TO
CPU
QUEUE
ETH
MAC
TDMoP BLOCK