Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 7 of 198
Table 11-16. Interrupt Controller Registers ........................................................................................................ 140
Table 11-17. Packet Classifier OAM Identification Registers.............................................................................. 147
Table 11-18. Ethernet MAC Registers ............................................................................................................... 148
Table 11-19. Ethernet MAC Counters................................................................................................................ 153
Table 12-1. JTAG Instruction Codes ................................................................................................................. 161
Table 12-2. JTAG ID Code ................................................................................................................................ 161
Table 13-1. Recommended DC Operating Conditions ....................................................................................... 163
Table 13-2. DC Electrical Characteristics .......................................................................................................... 163
Table 14-1. Input Pin Transition Time Requirements ......................................................................................... 164
Table 14-2. CPU Interface AC characteristics.................................................................................................... 164
Table 14-3. SPI Interface AC Characteristics..................................................................................................... 165
Table 14-4. SDRAM Interface AC Characteristics.............................................................................................. 166
Table 14-5. TDMoP TDM Interface AC Characteristics ...................................................................................... 169
Table 14-6. TDMoP TDM Clock AC Characteristics ........................................................................................... 169
Table 14-7. MII Management Interface AC Characteristics ................................................................................ 172
Table 14-8. MII Interface AC Characteristics ..................................................................................................... 172
Table 14-9. MII Clock Timing ............................................................................................................................ 172
Table 14-10. RMII Interface AC Characteristics ................................................................................................. 173
Table 14-11. RMII Clock Timing ........................................................................................................................ 173
Table 14-12. SSMII Interface AC Characteristics ............................................................................................... 173
Table 14-13. SSMII Clock Timing ...................................................................................................................... 173
Table 14-14. CLAD1 and CLAD2 Input Clock Specifications.............................................................................. 174
Table 14-15. JTAG Interface Timing .................................................................................................................. 175
Table 15-1. SPI Mode I/O Connections ............................................................................................................. 183
Table 15-2. List of Suggested SDRAM Devices ................................................................................................. 183
Table 16-1. Common Board Design Connections for DS34S101/2/4 (Sorted by Signal Name) .......................... 184
Table 16-2. DS34S108 Pin Assignment (Sorted by Signal Name) ..................................................................... 193
1. Introduction
The DS34S101/2/4/8 family of products provide single and multiport TDM-over-packet circuit emulation. Dedicated
payload-type engines are included for TDMoIP (AAL1), CESoPSN, SAToP, and HDLC.
Products in the DS34S10x family provide the mapping/demapping ability to enable the transport of TDM data
(Nx64kbps, E1, T1, J1, E3, T3, STS-1) over IP, MPLS or Ethernet networks. These products enable service
providers to migrate to next generation networks while continuing to provide legacy voice, data and leased-line
services. They allow enterprises to transport voice and video over the same IP/Ethernet network that is currently
used only for LAN traffic, thereby minimizing network maintenance and operating costs.
Packet-switched networks, such as IP networks, were not designed to transport TDM data and have no inherent
clock distribution mechanism. Therefore, when transporting TDM data over packet switched networks, the TDM
demapping function needs to accurately reconstruct the TDM service clock(s). The DS34S10x devices perform this
important clock recovery task, creating recovered clocks with jitter and wander levels that conform to ITU-T
G.823/824 and G.8261, even for networks which introduce significant packet delay variation and packet loss.
The circuit emulation technology in the DS34S10x products that makes this possible is called TDM-over-Packet
(TDMoP) and complements VoIP in those cases where VoIP is not applicable or where VoIP price/performance is
not sufficient. Most importantly, TDMoP technology provides higher voice quality with lower latency than VoIP.
Unlike VoIP, TDMoP can support all applications that run over E1/T1 circuits, not just voice. TDMoP can also
provide traditional leased-line services over IP and is transparent to protocols and signaling. Because TDMoP
provides an evolutionary, as opposed to revolutionary approach, investment protection is maximized.