Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 3 of 198
11.3 GLOBAL REGISTERS ..................................................................................................................... 91
11.4 TDM-OVER-PACKET REGISTERS ................................................................................................... 93
11.4.1 Configuration and Status Registers .................................................................................................... 94
11.4.2 Bundle Configuration Tables ............................................................................................................ 108
11.4.3 Counters .......................................................................................................................................... 117
11.4.4 Status Tables ................................................................................................................................... 120
11.4.5 Timeslot Assignment Tables ............................................................................................................. 122
11.4.6 CPU Queues .................................................................................................................................... 124
11.4.7 Transmit Buffers Pool ....................................................................................................................... 129
11.4.8 Jitter Buffer Control .......................................................................................................................... 130
11.4.9 Transmit Software CAS .................................................................................................................... 134
11.4.10 Receive Line CAS .......................................................................................................................... 136
11.4.11 Clock Recovery .............................................................................................................................. 137
11.4.12 Receive SW Conditioning Octet Select ........................................................................................... 138
11.4.13 Receive SW CAS ........................................................................................................................... 139
11.4.14 Interrupt Controller ......................................................................................................................... 140
11.4.15 Packet Classifier ............................................................................................................................ 147
11.4.16 Ethernet MAC................................................................................................................................. 148
12. JTAG INFORMATION ....................................................................................................................158
13. DC ELECTRICAL CHARACTERISTICS ........................................................................................163
14. AC TIMING CHARACTERISTICS ..................................................................................................164
14.1 CPU INTERFACE TIMING ..............................................................................................................164
14.2 SPI INTERFACE TIMING ................................................................................................................165
14.3 SDRAM INTERFACE TIMING .........................................................................................................166
14.4 TDM-OVER-PACKET TDM INTERFACE TIMING ...............................................................................169
14.5 ETHERNET MII/RMII/SSMII INTERFACE TIMING .............................................................................172
14.6 CLAD AND SYSTEM CLOCK TIMING ..............................................................................................174
14.7 JTAG INTERFACE TIMING ............................................................................................................175
15. APPLICATIONS .............................................................................................................................176
15.1 CONNECTING A SERIAL INTERFACE TRANSCEIVER .........................................................................176
15.2 CONNECTING AN ETHERNET PHY OR MAC ...................................................................................177
15.3 IMPLEMENTING CLOCK RECOVERY IN HIGH SPEED APPLICATIONS ..................................................179
15.4 CONNECTING A MOTOROLA MPC860 PROCESSOR .......................................................................179
15.4.1 Connecting the Bus Signals .............................................................................................................. 179
15.4.2 Connecting the H_READY_N Signal ................................................................................................ 182
15.5 WORKING IN SPI MODE ...............................................................................................................183
15.6 CONNECTING SDRAM DEVICES ...................................................................................................183
16. PIN ASSIGNMENTS ......................................................................................................................184
16.1 BOARD DESIGN FOR MULTIPLE DS34S101/2/4 DEVICES ...............................................................184
16.2 DS34S101 PIN ASSIGNMENT .......................................................................................................190
16.3 DS34S102 PIN ASSIGNMENT .......................................................................................................191
16.4 DS34S104 PIN ASSIGNMENT .......................................................................................................192
16.5 DS34S108 PIN ASSIGNMENT .......................................................................................................193
17. PACKAGE INFORMATION............................................................................................................197
18. THERMAL INFORMATION ............................................................................................................197
19. DATA SHEET REVISION HISTORY ..............................................................................................198