Datasheet
____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 196 of 198
Figure 16-4. DS34S108 Pin Assignment (HSBGA Package)
1 2 3 4 5 6 7 8 9 10 11
A
NC NC NC NC NC NC NC DVSS NC DVSS NC
B
DVSS DVDDIO NC NC NC NC NC DVDDIO NC DVDDIO DVDDC
C
NC NC DVDDIO DVDDC NC NC NC NC NC NC TDM1_RSIG_RTS
D
DVDDIO DVSS NC DVSS NC NC NC NC NC TDM1_RX TDM1_RX_SYNC
E
NC NC DVSS NC DVDDC NC NC NC TDM2_ACLK TDM1_ACLK TDM1_TSIG_CTS
F
DVSS DVDDIO NC NC NC DVSS NC NC TDM3_TX_MF_CD TDM2_TX_MF_CD TDM2_TSIG_CTS
G
NC NC TST_CLD NC DVDDC NC NC NC TDM3_TCLK TDM2_TCLK TDM2_TX
H
DVSS DVDDIO NC NC NC NC NC DVSS TDM4_RX TDM4_TX_SYNC TDM4_TCLK
J
CLK_SYS/SCCLK CLK_SYS_S TEST_CLK NC NC NC NC NC TDM4_TX DVDDIO DVDDIO
K
ACVSS2 ACVDD2 JTMS NC NC NC NC NC DVDDIO DVSS DVSS
L
CLK_HIGH DVDDC JTCLK NC NC NC NC NC DVDDIO DVSS DVSS
M
ACVSS1 ACVDD1 JTDI NC NC NC NC NC DVDDIO DVSS DVSS
N
MCLK DVSS JTDO NC NC NC NC NC DVDDIO DVSS DVSS
P
CLK_CMN RST_SYS_N JTRST_N NC NC NC NC NC NC DVDDIO DVDDIO
R
DVSS DVDDIO NC NC NC NC NC DVSS TDM6_RSIG_RTS TDM5_TX_MF_CD TDM5_RX
T
NC NC HiZ_N NC DVDDC NC NC NC TDM5_RSIG_RTS TDM6_TX_SYNC TDM8_RX_SYNC
U
DVSS DVDDIO NC NC NC DVSS NC NC TDM8_RCLK TDM8_TX_SYNC TDM7_TX_SYNC
V
NC NC DVDDIO NC DVDDC NC NC NC TDM5_RCLK TDM8_RX TDM5_ACLK
W
DVDDIO DVSS NC DVSS NC NC NC NC TDM7_TSIG_CTS TDM8_TX TDM8_TSIG_CTS
Y
NC NC DVSS NC NC NC NC NC TDM8_RSIG_RTS DVDDC TDM7_TCLK
AA
DVSS DVDDIO NC NC NC NC NC NC DVDDIO NC DVDDIO
AB
NC NC NC NC NC NC NC NC DVSS NC DVSS
1 2 3 4 5 6 7 8 9 10 11
12 13 14 15 16 17 18 19 20 21 22
DVDDC NC DVSS NC DVSS SD_A[0] SD_D[6] SD_A[5] SD_DQM[0] SD_D[3] SD_D[5]
A
DVSS NC DVDDIO NC DVDDIO SD_CS_N SD_A[3] SD_A[10] SD_DQM[2] SD_D[7] SD_D[10]
B
TDM1_TX TDM2_RX_SYNC TDM2_RSIG_RTS TDM3_RCLK SD_D[4] SD_WE_N SD_D[0] SD_BA[1] DVDDC SD_D[12] SD_D[14]
C
TDM1_RCLK TDM2_RX TDM3_RX_SYNC TDM3_RX SD_RAS_N SD_A[11] SD_A[9] DVSS SD_DQM[3] SD_D[15] SD_D[17]
D
TDM2_RCLK TDM1_TX_SYNC TDM2_TX_SYNC TDM3_TX SD_CAS_N SD_A[4] DVDDC SD_DQM[1] DVDDC SD_D[8] SD_D[21]
E
TDM1_TCLK TDM1_TX_MF_CD TDM3_TX_SYNC TDM4_RSIG_RTS SD_A[2] DVSS SD_A[1] SD_A[7] SD_A[8] SD_D[1] SD_D[24]
F
TDM3_TSIG_CTS TDM3_RSIG_RTS TDM3_ACLK TDM4_TSIG_CTS SD_D[29] SD_BA[0] DVDDC SD_D[2] SD_D[16] SD_D[19] SD_D[26]
G
TDM4_ACLK TDM4_TX_MF_CD TDM4_RX_SYNC DVSS SD_CLK SD_A[6] SD_D[13] SD_D[9] SD_D[11] SD_D[23] SD_D[28]
H
DVDDIO DVDDIO TDM4_RCLK SCEN
H_WR_BE1_N/SPI_MOS
H_INT[0]
H_WR_BE2_N/SPI_SEL_
SD_D[22] SD_D[18] SD_D[20] SD_D[31]
J
DVSS DVSS DVDDIO STMD H_AD[3] H_R_W_N/SPI_CP H_READY_N H_CPU_SPI_N SD_D[27] SD_D[25] SD_D[30]
K
DVSS DVSS DVDDIO H_AD[11] H_AD[9] H_CS_N H_AD[1]
H_WR_BE0_N/SPI_CLK
H_WR_BE3_N/SPI_CI DAT_32_16_N NC
L
DVSS DVSS DVDDIO MBIST_DONE H_AD[7] H_AD[20] H_AD[6] H_AD[18] H_AD[8] H_AD[2] H_AD[4]
M
DVSS DVSS DVDDIO MBIST_FAIL H_AD[13] H_AD[23] H_D[2] H_AD[16] H_AD[14] H_AD[19] H_AD[10]
N
DVDDIO DVDDIO TDM5_TSIG_CTS MBIST_EN H_D[5] H_D[22] H_D[11] H_D[14] H_AD[21] H_AD[12] H_AD[15]
P
TDM5_TX TDM7_RX_SYNC TDM5_TX_SYNC DVSS H_D[7] H_D[24] H_D[29] H_D[20] H_D[3] H_AD[17] H_AD[22]
R
TDM6_RCLK TDM5_TCLK TDM7_RSIG_RTS TDM6_RX_SYNC H_D[9] H_D[4] DVDDC H_D[26] H_AD[5] H_AD[24] H_D[0]/SPI_MISO
T
TDM7_RX TDM7_RCLK TDM5_RX_SYNC TDM6_TX_MF_CD H_D[28] DVSS H_D[6] H_D[31] H_D[19] H_D[1] H_D[8]
U
TDM6_RX TDM6_TSIG_CTS TDM7_ACLK TDM6_TCLK CLK_MII_RX MII_RX_ERR DVDDC H_D[25] DVDDC H_D[23] H_D[10]
V
TDM7_TX TDM8_TX_MF_CD TDM6_ACLK TDM6_TX MII_RXD[1] MII_TX_EN MII_TXD[1] DVSS H_D[30] H_D[27] H_D[12]
W
DVSS TDM8_ACLK TDM8_TCLK TDM7_TX_MF_CD MII_RXD[3] MII_RX_DV MII_CRS CLK_SSMII_TX DVDDC H_D[13] H_D[15]
Y
NC DVDDIO NC DVDDIO MII_RXD[0] MII_COL CLK_MII_TX MII_TXD[2] MDIO H_D[16] H_D[17]
AA
NC DVSS NC DVSS MII_RXD[2] MDC MII_TXD[0] MII_TXD[3] MII_TX_ERR H_D[18] H_D[21]
AB
12 13 14 15 16 17 18 19 20 21 22