Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 176 of 198
15.
Applications
15.1
Connecting a Serial Interface Transceiver
Figure 15-1 below shows the connection of one port of a DS34S10x chip to a serial interface transceiver such as
V.35 or RS-530. The figure shows one port in a DCE (Data Communications Equipment) application. All other ports
can be connected in the same way.
Each direction (Tx and Rx) has its own clock. However, TDM1_RCLK is optional, as the DS34S10x chip may work
in one clock mode (GCR1.CLKMODE=0) in which both directions are clocked by TDM1_TCLK. The clock source of
TDM1_RCLK or TDM1_TCLK can be:
Internal (from the local oscillator)
External
Recovered from the packet network (provided by the chip on TDM1_ACLK).
The control input signal TDMn_RSIG_RTS does not affect the data reception, but its value can be read by the CPU
from register field Port[n]_stat_reg1.RTS.
The TDMn_TSIG_CTS and TDMn_TX_MF_CD outputs can be controlled by software using registers fields CTS
and CD in the Port[n]_cfg_reg register.
Figure 15-1. Connecting Port 1 to a Serial Transceiver
DS34S10x
TDM
1
_
ACLK
SERIAL
INTERTFACE
TRANSC
EIVER
(DCE MODE)
TDM
TDM
1
_
RX
TDM
1
_
TCLK
TDM
1
_
RCLK
TDM
1
_
TSIG
_
CTS
TDM
1
_
RSIG
_
RTS
TDM
1
_
TX
_
MF
_
CD
TX
RX
TCLK
RCLK
CTS
RTS
CD
INTERNAL
CLOCK
EXTERNAL
CLOCK