Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 173 of 198
Figure 14-16. MII Interface Input Signal Timing
CLK_MII_RX
MII_RXD,MII_RX_DV,MII_RX_ERR
T159
T160
T158
T180
Table 14-10. RMII Interface AC Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CLK_MII_TX Rising to MII_TXD[3:2], MII_TX_EN Output
Hold
T162
2
ns
CLK_MII_TX Rising to MII_TXD[3:2], MII_TX_EN Output
Valid
T163
13.5
ns
MII_RXD[3:2], MII_RX_DV, MII_RX_ERR Input Setup
Prior to CLK_MII_TX Rising
T164
7
ns
MII_RXD(3:2], MII_RX_DV, MII_RX_ERR Input Hold
After CLK_MII_TX Rising
T165
0
ns
Table 14-11. RMII Clock Timing
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CLK_MII_TX Frequency
T161
50
MHz
CLK_MII_TX Duty Cycle
T183
40
60
%
Figure 14-17. RMII Interface Output Signal Timing
CLK_MII_TX(RMII_REF_CLK)
MII_TXD(3:2),MII_TX_EN
T162
T163
T161
Figure 14-18. RMII Interface Input Signal Timing
CLK_MII_TX(RMII_REF_CLK)
II_RXD(3:2),MII_RX_DV,MII_RX_ERR
T164
T165
T183
Table 14-12. SSMII Interface AC Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CLK_SSMII_TX Rising to MII_TXD[1:0] Output
T172
1.5
5
ns
MII_RXD[1:0] Input Setup Prior to CLK_MII_RX Rising
T175
1.5
ns
MII_RXD[1:0] Input Hold After CLK_MII_RX Rising
T176
1.3
ns
Table 14-13. SSMII Clock Timing
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CLK_SSMII_TX Frequency
T171
125
MHz
CLK_SSMII_TX Duty Cycle
T189
40
60
%
CLK_MII_RX Frequency
T171
125
MHz
CLK_MII_RX Duty Cycle
T189
40
60
%