Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 165 of 198
Figure 14-2. CPU Interface Write Cycle Timing
H_CS_N
H_R_W_N
H_AD[24:1]
H_WR_BEx_N[3:0]
H_D[31:0](input)
H_ READ Y_N
T43
T33
T35
T34
T36
T40
T31
T32
T37
T26
Figure 14-3. CPU Interface Read Cycle Timing
H_CS_N
H_R_W_N
H_AD[24:1]
H_D[31:0](output)
H_ READ Y_N
T43
T35
T33
T36
T34
T22
T37
T26
T44
14.2 SPI Interface Timing
Table 14-3. SPI Interface AC Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
SPI_SEL_N Deasserted to SPI_SEL_N Asserted
T230
70
ns
SPI_CLK Frequency
T231
12.09
MHz
SPI_CLK Period
T231
82.7
ns
SPI_CLK to SPI_MISO Output Hold
T232
5.3
ns
SPI_CLK to SPI_MISO Output Valid
T233
17.5
ns
SPI_MOSI Input Hold After SPI_CLK Edge
T234
5
ns
SPI_MOSI Input Setup Prior to SPI_CLK Edge
T235
5
ns
SPI_SEL_N Asserted to SPI_MISO Active
T236
15
ns
SPI_SEL_N Deasserted to SPI_MISO High-Z
T237
12
ns
NOTE: The output timing specified assumes 50pf load.