Datasheet

____________________________________________________ DS34S101, DS34S102, DS34S104, DS34S108
Rev: 032609 162 of 198
Identification Register. The Identification register contains a 32-bit shift register and a 32-bit latched parallel
output. This register is selected during the IDCODE instruction and when the TAP controller is in the Test-Logic-
Reset state.
Boundary Scan Register. This register contains both a shift register path and a latched parallel output for all
control cells and digital I/O cells and is 32 bits in length. The BSDL file found at http://www.maxim-
ic.com/tools/bsdl/ shows the entire cell bit locations and definitions.